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Message-ID: <CAL_JsqLxojde1Pr4ObCbfWh+D=bopZrb0x6eoXXvjBwTENgNGw@mail.gmail.com>
Date: Thu, 21 Oct 2021 16:11:53 -0500
From: Rob Herring <robh@...nel.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: linux-arm-msm <linux-arm-msm@...r.kernel.org>,
devicetree@...r.kernel.org,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] arm64: dts: qcom: Fix 'interrupt-map' parent address cells
On Tue, Sep 28, 2021 at 2:22 PM Rob Herring <robh@...nel.org> wrote:
>
> The 'interrupt-map' in several QCom SoCs is malformed. The '#address-cells'
> size of the parent interrupt controller (the GIC) is not accounted for.
>
> Cc: Andy Gross <agross@...nel.org>
> Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
> Cc: linux-arm-msm@...r.kernel.org
> Signed-off-by: Rob Herring <robh@...nel.org>
> ---
> arch/arm64/boot/dts/qcom/msm8998.dtsi | 8 ++++----
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 16 ++++++++--------
> 2 files changed, 12 insertions(+), 12 deletions(-)
Ping!
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index 34039b5c8017..5a04a0427d08 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -954,10 +954,10 @@ pcie0: pci@...0000 {
> interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "msi";
> interrupt-map-mask = <0 0 0 0x7>;
> - interrupt-map = <0 0 0 1 &intc 0 135 IRQ_TYPE_LEVEL_HIGH>,
> - <0 0 0 2 &intc 0 136 IRQ_TYPE_LEVEL_HIGH>,
> - <0 0 0 3 &intc 0 138 IRQ_TYPE_LEVEL_HIGH>,
> - <0 0 0 4 &intc 0 139 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-map = <0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 2 &intc 0 0 136 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 3 &intc 0 0 138 IRQ_TYPE_LEVEL_HIGH>,
> + <0 0 0 4 &intc 0 0 139 IRQ_TYPE_LEVEL_HIGH>;
>
> clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
> <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 6d7172e6f4c3..287c12666a3a 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -1990,10 +1990,10 @@ pcie0: pci@...0000 {
> interrupt-names = "msi";
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0x7>;
> - interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
> - <0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
> - <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
> - <0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
> + interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
> + <0 0 0 2 &intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
> + <0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
> + <0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
>
> clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
> <&gcc GCC_PCIE_0_AUX_CLK>,
> @@ -2095,10 +2095,10 @@ pcie1: pci@...8000 {
> interrupt-names = "msi";
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0x7>;
> - interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
> - <0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
> - <0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
> - <0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
> + interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
> + <0 0 0 2 &intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
> + <0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
> + <0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
>
> clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
> <&gcc GCC_PCIE_1_AUX_CLK>,
> --
> 2.30.2
>
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