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Message-ID: <CAK8P3a0dnRE4Sr-En-hPYbRAWAYgYZ7FBtC2h39RXggy=tA_HQ@mail.gmail.com>
Date:   Thu, 21 Oct 2021 17:18:16 +0200
From:   Arnd Bergmann <arnd@...db.de>
To:     Palmer Dabbelt <palmerdabbelt@...gle.com>
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
        Conor.Dooley@...rochip.com, Arnd Bergmann <arnd@...db.de>,
        Olof Johansson <olof@...om.net>, arm-soc <arm@...nel.org>,
        SoC Team <soc@...nel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "moderated list:ARM/SAMSUNG EXYNOS ARM ARCHITECTURES" 
        <linux-samsung-soc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv <linux-riscv@...ts.infradead.org>
Subject: Re: [GIT PULL] riscv: dts: few cleanups for v5.16

On Thu, Oct 21, 2021 at 5:06 PM Palmer Dabbelt <palmerdabbelt@...gle.com> wrote:
> On Thu, 21 Oct 2021 06:09:50 PDT (-0700), krzysztof.kozlowski@...onical.com wrote:
> >
> > There is only one Microchip patch here (plic/clint). Others are for
> > SiFive. All the patches are described in the pull reqeust:
> > https://lore.kernel.org/lkml/20211021090955.115005-1-krzysztof.kozlowski@canonical.com/
> >
> > I had also second set of RISC-V patches for Microchip. These were picked
> > up by Palmer:
> > https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/log/?h=for-next
>
> Sorry I missed this.  If you guys took this through the SOC tree that's
> fine, otherwise LMK and I'll put it in the RISC-V tree.

I haven't merged it yet, please add it to your tree then.

        Arnd

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