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Message-ID: <d32de27d-510e-520e-f616-4167a6ceebb4@infradead.org>
Date: Fri, 22 Oct 2021 16:01:46 -0700
From: Randy Dunlap <rdunlap@...radead.org>
To: qinjian <qinjian@...lus1.com>, p.zabel@...gutronix.de
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
wells.lu@...plus.com
Subject: Re: [PATCH] reset: Add Sunplus SP7021 reset driver
On 10/22/21 2:11 AM, qinjian wrote:
> Add reset driver for Sunplus SP7021 SoC.
>
> Signed-off-by: qinjian <qinjian@...lus1.com>
> ---
> MAINTAINERS | 1 +
> drivers/reset/Kconfig | 9 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-sunplus.c | 159 ++++++++++++++++++++++++++++++++++
> 4 files changed, 170 insertions(+)
> create mode 100644 drivers/reset/reset-sunplus.c
>
Hi,
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index be799a5ab..3e2e49998 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -249,6 +249,15 @@ config RESET_TI_SYSCON
> you wish to use the reset framework for such memory-mapped devices,
> say Y here. Otherwise, say N.
>
> +config RESET_SUNPLUS
> + bool "Sunplus SoCs Reset Driver"
> + default SOC_SP7021 || SOC_Q645
> + help
> + This enables the reset driver support for Sunplus SP7021 and Q645
> + SoC family. Say Y if you want to control reset signals by the reset
> + controller. Otherwise, say N.
> + This will be enabled by default.
What does that last sentence mean?
thanks.
--
~Randy
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