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Message-ID: <accf35b6-2c13-227b-c101-a36cdcd5e73d@canonical.com>
Date: Fri, 22 Oct 2021 10:55:42 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Palmer Dabbelt <palmerdabbelt@...gle.com>,
Arnd Bergmann <arnd@...db.de>
Cc: Conor.Dooley@...rochip.com, Olof Johansson <olof@...om.net>,
arm@...nel.org, soc@...nel.org,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
krzk@...nel.org, Paul Walmsley <paul.walmsley@...ive.com>,
aou@...s.berkeley.edu, linux-riscv@...ts.infradead.org
Subject: Re: [GIT PULL] riscv: dts: few cleanups for v5.16
On 21/10/2021 17:35, Palmer Dabbelt wrote:
> On Thu, 21 Oct 2021 08:18:16 PDT (-0700), Arnd Bergmann wrote:
>> On Thu, Oct 21, 2021 at 5:06 PM Palmer Dabbelt <palmerdabbelt@...gle.com> wrote:
>>> On Thu, 21 Oct 2021 06:09:50 PDT (-0700), krzysztof.kozlowski@...onical.com wrote:
>>>>
>>>> There is only one Microchip patch here (plic/clint). Others are for
>>>> SiFive. All the patches are described in the pull reqeust:
>>>> https://lore.kernel.org/lkml/20211021090955.115005-1-krzysztof.kozlowski@canonical.com/
>>>>
>>>> I had also second set of RISC-V patches for Microchip. These were picked
>>>> up by Palmer:
>>>> https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/log/?h=for-next
>>>
>>> Sorry I missed this. If you guys took this through the SOC tree that's
>>> fine, otherwise LMK and I'll put it in the RISC-V tree.
>>
>> I haven't merged it yet, please add it to your tree then.
>
> OK, it's in. Sorry for missing this, IRC is always a good bet for these
> sorts of things as my inbox can get pretty hosed.
Great, thanks!
Best regards,
Krzysztof
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