| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20211022101856.8612-2-peng.fan@oss.nxp.com>
Date: Fri, 22 Oct 2021 18:18:55 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: jassisinghbrar@...il.com, robh+dt@...nel.org, shawnguo@...nel.org,
s.hauer@...gutronix.de, o.rempel@...gutronix.de
Cc: kernel@...gutronix.de, festevam@...il.com, aisheng.dong@....com,
linux-imx@....com, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Peng Fan <peng.fan@....com>
Subject: [PATCH 1/2] dt-bindings: mailbox: imx-mu: add i.MX8ULP S400 MU support
From: Peng Fan <peng.fan@....com>
Similar to i.MX8QM/QXP SCU, i.MX8ULP SCU MU is dedicated for
communication between S400 and Cortex-A cores from hardware design,
it could not be reused for other purpose. To use S400 MU more
effectivly, add "fsl,imx8ulp-mu-s4" compatile to support fast IPC.
Signed-off-by: Peng Fan <peng.fan@....com>
---
Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index 675ad9de15bb..a337bcd80c4a 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -28,6 +28,7 @@ properties:
- const: fsl,imx7ulp-mu
- const: fsl,imx8ulp-mu
- const: fsl,imx8-mu-scu
+ - const: fsl,imx8ulp-mu-s4
- items:
- enum:
- fsl,imx7s-mu
--
2.30.0
Powered by blists - more mailing lists