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Message-ID: <87sfwst8ju.wl-maz@kernel.org>
Date:   Sat, 23 Oct 2021 10:05:57 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     qinjian <qinjian@...lus1.com>
Cc:     tglx@...utronix.de, robh+dt@...nel.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/4] dt-bindings: interrupt-controller: Add bindings for SP7021 interrupt controller

On Fri, 22 Oct 2021 07:07:37 +0100,
qinjian <qinjian@...lus1.com> wrote:
> 
> Add documentation to describe Sunplus SP7021 interrupt controller bindings.
> 
> Signed-off-by: qinjian <qinjian@...lus1.com>
> ---
>  .../sunplus,sp7021-intc.yaml                  | 69 +++++++++++++++++++
>  MAINTAINERS                                   |  2 +
>  .../interrupt-controller/sp7021-intc.h        | 24 +++++++
>  3 files changed, 95 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml
>  create mode 100644 include/dt-bindings/interrupt-controller/sp7021-intc.h
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml
> new file mode 100644
> index 000000000..73719f65b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) Sunplus Co., Ltd. 2021
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/sunplus,sp7021-intc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Sunplus SP7021 SoC Interrupt Controller Device Tree Bindings
> +
> +maintainers:
> +  - Qin Jian <qinjian@...lus1.com>
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: sunplus,sp7021-intc
> +
> +  interrupt-controller: true
> +
> +  "#interrupt-cells":
> +    const: 2
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    description:
> +      Interrupts references to primary interrupt controller
> +
> +  ext0-mask:
> +    description:
> +      cpu affinity of EXT_INT0.
> +    $ref: "/schemas/types.yaml#/definitions/uint32"
> +    minimum: 1
> +    maximum: 16

That's not a description of the HW. This is just a SW policy that
trickles into the DT. The output interrupt is simply connected to the
parent interrupt controller, and how it is routed is out of the scope
of the DT. This (and its ext1 sibling) should be dropped.

	M.

-- 
Without deviation from the norm, progress is not possible.

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