[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YXWmAq1azGmrTVxy@lunn.ch>
Date: Sun, 24 Oct 2021 20:29:22 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Luo Jie <luoj@...eaurora.org>
Cc: hkallweit1@...il.com, linux@...linux.org.uk, davem@...emloft.net,
kuba@...nel.org, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, sricharan@...eaurora.org
Subject: Re: [PATCH v7 03/14] net: phy: at803x: improve the WOL feature
On Sun, Oct 24, 2021 at 04:27:27PM +0800, Luo Jie wrote:
> The wol feature is controlled by the MMD3.8012 bit5,
> need to set this bit when the wol function is enabled.
>
> The reg18 bit0 is for enabling WOL interrupt, when wol
> occurs, the wol interrupt status reg19 bit0 is set to 1.
>
> Call phy_trigger_machine if there are any other interrupt
> pending in the function set_wol.
>
> Signed-off-by: Luo Jie <luoj@...eaurora.org>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
Powered by blists - more mailing lists