lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <d1cb8a37-b749-4098-a248-f0a9997e05a9@linaro.org>
Date:   Mon, 25 Oct 2021 21:33:38 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Vinod Koul <vkoul@...nel.org>
Cc:     Rob Clark <robdclark@...il.com>, linux-arm-msm@...r.kernel.org,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Jonathan Marek <jonathan@...ek.ca>,
        Abhinav Kumar <abhinavk@...eaurora.org>,
        Jeffrey Hugo <jeffrey.l.hugo@...il.com>,
        Sumit Semwal <sumit.semwal@...aro.org>,
        linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        freedreno@...ts.freedesktop.org
Subject: Re: [PATCH v2 06/11] drm/msm/disp/dpu1: Don't use DSC with mode_3d

On 25/10/2021 19:10, Vinod Koul wrote:
> On 25-10-21, 17:40, Dmitry Baryshkov wrote:
>> On 20/10/2021 09:57, Vinod Koul wrote:
>>> On 14-10-21, 16:50, Dmitry Baryshkov wrote:
>>>> On 14/10/2021 16:41, Dmitry Baryshkov wrote:
>>>>> On 07/10/2021 10:08, Vinod Koul wrote:
> 
>>>>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
>>>>>> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
>>>>>> index 806c171e5df2..5dfac5994bd4 100644
>>>>>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
>>>>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
>>>>>> @@ -39,6 +39,7 @@ struct dpu_hw_stage_cfg {
>>>>>>      * @mode_3d:               3d mux configuration
>>>>>>      * @merge_3d:              3d merge block used
>>>>>>      * @intf_mode_sel:         Interface mode, cmd / vid
>>>>>> + * @dsc:                   DSC BIT masks
>>>>>>      * @stream_sel:            Stream selection for multi-stream interfaces
>>>>>>      */
>>>>>>     struct dpu_hw_intf_cfg {
>>>>>> @@ -46,6 +47,7 @@ struct dpu_hw_intf_cfg {
>>>>>>         enum dpu_3d_blend_mode mode_3d;
>>>>>>         enum dpu_merge_3d merge_3d;
>>>>>>         enum dpu_ctl_mode_sel intf_mode_sel;
>>>>>> +    unsigned int dsc;
>>>>
>>>> I think this should be:
>>>> enum dpu_dsc dsc[MAX_DSCS];
>>>> unsigned int num_dsc;
>>>
>>> hmmm, how do we go about getting the num_dsc value here.
>>> dpu_encoder_phys does not know about that..
>>
>> dpu_encoder_get_topology() can decide whether to use DSC or not and then set
>> num_dsc. For now it will always set 2 if we are using DSC at all, but let's
>> keep the decision in a single place rather than having it scattered all over
>> the driver.
> 
> Yes agree, but dpu_encoder_get_topology() is private to encoder. Am not
> sure how best to propagate the info into the hw_intf_cfg?

Let dpu_encoder_get_topology() set num_dscs to 2 and merge_3d to 0 if 
the encoder has DSC information and to 0 otherwise. This will cover all 
topologies that we care about for now.

Regarding getting the DSC config. Currently you use single priv->dsc 
pointer, which works for the simple case of single DSI output, but will 
break as soon as somebody has DSC DSI + DP config. Either we can 
introduce the array of DSC configs, or we can add a DSI-specific 
msm_dsi_get_dsc_config(), which will be later paired with the 
corresponding displayport function.

-- 
With best wishes
Dmitry

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ