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Date:   Mon, 25 Oct 2021 20:58:47 +0200
From:   Erik Ekman <erik@...o.se>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Edward Cree <ecree.xilinx@...il.com>,
        Martin Habets <habetsm.xilinx@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] sfc: Fix reading non-legacy supported link modes

On Tue, 19 Oct 2021 at 20:29, Andrew Lunn <andrew@...n.ch> wrote:
>
> On Tue, Oct 19, 2021 at 07:41:46PM +0200, Erik Ekman wrote:
> > On Tue, 19 Oct 2021 at 17:21, Andrew Lunn <andrew@...n.ch> wrote:
> > >
> > > On Sun, Oct 17, 2021 at 07:16:57PM +0200, Erik Ekman wrote:
> > > > Everything except the first 32 bits was lost when the pause flags were
> > > > added. This makes the 50000baseCR2 mode flag (bit 34) not appear.
> > > >
> > > > I have tested this with a 10G card (SFN5122F-R7) by modifying it to
> > > > return a non-legacy link mode (10000baseCR).
> > >
> > > Does this need a Fixes: tag? Should it be added to stable?
> > >
> >
> > The speed flags in use that can be lost are for 50G and 100G.
> > The affected devices are ones based on the Solarflare EF100 networking
> > IP in Xilinx FPGAs supporting 10/25/40/100-gigabit.
> > I don't know how widespread these are, and if there might be enough
> > users for adding this to stable.
> >
> > The gsettings api code for sfc was added in 7cafe8f82438ced6d ("net:
> > sfc: use new api ethtool_{get|set}_link_ksettings")
> > and the bug was introduced then, but bits would only be lost after
> > support for 25/50/100G was added in
> > 5abb5e7f916ee8d2d ("sfc: add bits for 25/50/100G supported/advertised speeds").
> > Not sure which of these should be used for a Fixes tag.
>
> I would you this second one, since that is when it becomes visible to
> users.
>
Thanks

I found that the SFC9250 is also affected (it supports 10/25/40/50/100G)

Fixes: 5abb5e7f916ee8 ("sfc: add bits for 25/50/100G
supported/advertised speeds")

/Erik

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