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Message-ID: <CACPK8Xd5eYpsFNw1jEjv3NaShgzE3zC_Ct29pJM34TfrqRTNtQ@mail.gmail.com>
Date: Tue, 26 Oct 2021 21:03:22 +0000
From: Joel Stanley <joel@....id.au>
To: Konstantin Aladyshev <aladyshev22@...il.com>
Cc: Supreeth Venkatesh <supreeth.venkatesh@....com>,
Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
SoC Team <soc@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Andrew Jeffery <andrew@...id.au>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-aspeed <linux-aspeed@...ts.ozlabs.org>
Subject: Re: [PATCH] ARM: dts: aspeed: Add AMD DaytonaX BMC
Hello Konstantin,
On Tue, 26 Oct 2021 at 20:01, Konstantin Aladyshev
<aladyshev22@...il.com> wrote:
>
> Add initial version of device tree for the BMC in the AMD DaytonaX
> platform.
>
> AMD DaytonaX platform is a customer reference board (CRB) with an
> Aspeed ast2500 BMC manufactured by AMD.
>
> Signed-off-by: Konstantin Aladyshev <aladyshev22@...il.com>
This looks good. I have one comment about the GPIOs below.
> +&gpio {
> + status = "okay";
> + gpio-line-names =
> + /*A0-A7*/ "","","FAULT_LED","","","","","",
> + /*B0-B7*/ "","","","","","","","",
> + /*C0-C7*/ "CHASSIS_ID_BTN","","","","","","","",
> + /*D0-D7*/ "","","ASSERT_BMC_READY","","","","","",
> + /*E0-E7*/ "MON_P0_RST_BTN","ASSERT_RST_BTN","MON_P0_PWR_BTN","ASSERT_PWR_BTN","",
> + "MON_P0_PWR_GOOD","MON_PWROK","",
For systems that will run openbmc, we try to use naming conventions
from this document:
https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md
If a GPIO is missing from that doc I encourage you to add it.
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