linux-kernel - Re: [PATCH 2/4] arm64: implement support for static call trampolines

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 26 Oct 2021 12:45:55 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Mark Rutland <mark.rutland@....com>
Cc:     Ard Biesheuvel <ardb@...nel.org>,
        Frederic Weisbecker <frederic@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        James Morse <james.morse@....com>,
        David Laight <David.Laight@...lab.com>,
        Quentin Perret <qperret@...gle.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>
Subject: Re: [PATCH 2/4] arm64: implement support for static call trampolines

On Tue, Oct 26, 2021 at 11:36:55AM +0100, Mark Rutland wrote:

> My preference overall is to keep the trampoline self-contained, and I'd
> prefer to keep the RET inline in the trampoline rather than trying to
> factor it out so that all the control-flow is clearly in one place.
> 
> So I'd prefer that we have the sequence as-is:
> 
> | 0:	.quad 0x0
> | 	bti	c
> | 	< insn >
> | 	ldr	x16, 0b
> | 	cbz	x16, 1f
> | 	br	x16
> | 1:	ret

OK, fair enough. In that case:

Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>

Although I do think that function can use a comment to explain the magic
involved.

> If we knew these were only called with IRQs enabled (and so we can take
> an IPI to generate a context synchronization event), we could patch
> <insn> to a RET and point the literal back at the BTI, e.g.

Given the static_call() usage on x86 I'm pretty sure you'll want them
with IRQs disabled.