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Date: Tue, 26 Oct 2021 20:22:34 +0800
From: kernel test robot <lkp@...el.com>
To: Bhaskara Budiredla <bbudiredla@...vell.com>, will@...nel.org,
mark.rutland@....com, robh+dt@...nel.org, bbhushan2@...vell.com,
sgoutham@...vell.com
Cc: llvm@...ts.linux.dev, kbuild-all@...ts.01.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Bhaskara Budiredla <bbudiredla@...vell.com>
Subject: Re: [PATCH v6 1/2] drivers: perf: Add LLC-TAD perf counter support
Hi Bhaskara,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on linus/master v5.15-rc7 next-20211026]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Bhaskara-Budiredla/drivers-perf-Add-Marvell-CN10K-LLC-TAD-pmu-driver/20211018-233301
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm-randconfig-c002-20211025 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project a461fa64bb37cffd73f683c74f6b0780379fc2ca)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/0day-ci/linux/commit/85d99064ace8ea1a9e64cbd905097e61c6bb395c
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Bhaskara-Budiredla/drivers-perf-Add-Marvell-CN10K-LLC-TAD-pmu-driver/20211018-233301
git checkout 85d99064ace8ea1a9e64cbd905097e61c6bb395c
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All errors (new ones prefixed by >>):
>> drivers/perf/marvell_cn10k_tad_pmu.c:57:11: error: implicit declaration of function 'readq' [-Werror,-Wimplicit-function-declaration]
new += readq(tad_pmu->regions[i].base +
^
>> drivers/perf/marvell_cn10k_tad_pmu.c:76:3: error: implicit declaration of function 'writeq_relaxed' [-Werror,-Wimplicit-function-declaration]
writeq_relaxed(0, tad_pmu->regions[i].base +
^
drivers/perf/marvell_cn10k_tad_pmu.c:96:3: error: implicit declaration of function 'writeq_relaxed' [-Werror,-Wimplicit-function-declaration]
writeq_relaxed(0, tad_pmu->regions[i].base +
^
>> drivers/perf/marvell_cn10k_tad_pmu.c:103:13: error: implicit declaration of function 'readq_relaxed' [-Werror,-Wimplicit-function-declaration]
reg_val = readq_relaxed(tad_pmu->regions[i].base +
^
drivers/perf/marvell_cn10k_tad_pmu.c:103:13: note: did you mean 'writeq_relaxed'?
drivers/perf/marvell_cn10k_tad_pmu.c:76:3: note: 'writeq_relaxed' declared here
writeq_relaxed(0, tad_pmu->regions[i].base +
^
4 errors generated.
vim +/readq +57 drivers/perf/marvell_cn10k_tad_pmu.c
45
46 static void tad_pmu_event_counter_read(struct perf_event *event)
47 {
48 struct tad_pmu *tad_pmu = to_tad_pmu(event->pmu);
49 struct hw_perf_event *hwc = &event->hw;
50 u32 counter_idx = hwc->idx;
51 u64 delta, prev, new;
52 int i;
53
54 do {
55 prev = local64_read(&hwc->prev_count);
56 for (i = 0, new = 0; i < tad_pmu->region_cnt; i++)
> 57 new += readq(tad_pmu->regions[i].base +
58 TAD_PFC(counter_idx));
59 } while (local64_cmpxchg(&hwc->prev_count, prev, new) != prev);
60
61 delta = (new - prev) & GENMASK_ULL(63, 0);
62 local64_add(delta, &event->count);
63 }
64
65 static void tad_pmu_event_counter_stop(struct perf_event *event, int flags)
66 {
67 struct tad_pmu *tad_pmu = to_tad_pmu(event->pmu);
68 struct hw_perf_event *hwc = &event->hw;
69 u32 counter_idx = hwc->idx;
70 int i;
71
72 /* TAD()_PFC() stop counting on the write
73 * which sets TAD()_PRF()[CNTSEL] == 0
74 */
75 for (i = 0; i < tad_pmu->region_cnt; i++)
> 76 writeq_relaxed(0, tad_pmu->regions[i].base +
77 TAD_PRF(counter_idx));
78
79 tad_pmu_event_counter_read(event);
80 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
81 }
82
83 static void tad_pmu_event_counter_start(struct perf_event *event, int flags)
84 {
85 struct tad_pmu *tad_pmu = to_tad_pmu(event->pmu);
86 struct hw_perf_event *hwc = &event->hw;
87 u32 event_idx = event->attr.config;
88 u32 counter_idx = hwc->idx;
89 u64 reg_val;
90 int i;
91
92 hwc->state = 0;
93
94 /* Typically TAD_PFC() are zeroed to start counting */
95 for (i = 0; i < tad_pmu->region_cnt; i++)
96 writeq_relaxed(0, tad_pmu->regions[i].base +
97 TAD_PFC(counter_idx));
98
99 /* TAD()_PFC() start counting on the write
100 * which sets TAD()_PRF()[CNTSEL] != 0
101 */
102 for (i = 0; i < tad_pmu->region_cnt; i++) {
> 103 reg_val = readq_relaxed(tad_pmu->regions[i].base +
104 TAD_PRF(counter_idx));
105 reg_val |= (event_idx & 0xFF);
106 writeq_relaxed(reg_val, tad_pmu->regions[i].base +
107 TAD_PRF(counter_idx));
108 }
109 }
110
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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