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Message-ID: <163526500630.626.6169708152104186956.tip-bot2@tip-bot2>
Date: Tue, 26 Oct 2021 16:16:46 -0000
From: "tip-bot2 for Thomas Gleixner" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Thomas Gleixner <tglx@...utronix.de>,
"Chang S. Bae" <chang.seok.bae@...el.com>,
Borislav Petkov <bp@...e.de>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: x86/fpu] x86/fpu: Add fpu_state_config::legacy_features
The following commit has been merged into the x86/fpu branch of tip:
Commit-ID: c33f0a81a2cf3920465309ce683534751bb86485
Gitweb: https://git.kernel.org/tip/c33f0a81a2cf3920465309ce683534751bb86485
Author: Thomas Gleixner <tglx@...utronix.de>
AuthorDate: Thu, 21 Oct 2021 15:55:09 -07:00
Committer: Borislav Petkov <bp@...e.de>
CommitterDate: Tue, 26 Oct 2021 10:18:09 +02:00
x86/fpu: Add fpu_state_config::legacy_features
The upcoming prctl() which is required to request the permission for a
dynamically enabled feature will also provide an option to retrieve the
supported features. If the CPU does not support XSAVE, the supported
features would be 0 even when the CPU supports FP and SSE.
Provide separate storage for the legacy feature set to avoid that and fill
in the bits in the legacy init function.
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Signed-off-by: Chang S. Bae <chang.seok.bae@...el.com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Link: https://lkml.kernel.org/r/20211021225527.10184-6-chang.seok.bae@intel.com
---
arch/x86/include/asm/fpu/types.h | 7 +++++++
arch/x86/kernel/fpu/init.c | 9 ++++++---
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/fpu/types.h b/arch/x86/include/asm/fpu/types.h
index c3ec562..595122f 100644
--- a/arch/x86/include/asm/fpu/types.h
+++ b/arch/x86/include/asm/fpu/types.h
@@ -503,6 +503,13 @@ struct fpu_state_config {
* be requested by user space before usage.
*/
u64 default_features;
+ /*
+ * @legacy_features:
+ *
+ * Features which can be reported back to user space
+ * even without XSAVE support, i.e. legacy features FP + SSE
+ */
+ u64 legacy_features;
};
/* FPU state configuration information */
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 7074154..621f4b6 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -193,12 +193,15 @@ static void __init fpu__init_system_xstate_size_legacy(void)
* Note that the size configuration might be overwritten later
* during fpu__init_system_xstate().
*/
- if (!cpu_feature_enabled(X86_FEATURE_FPU))
+ if (!cpu_feature_enabled(X86_FEATURE_FPU)) {
size = sizeof(struct swregs_state);
- else if (cpu_feature_enabled(X86_FEATURE_FXSR))
+ } else if (cpu_feature_enabled(X86_FEATURE_FXSR)) {
size = sizeof(struct fxregs_state);
- else
+ fpu_user_cfg.legacy_features = XFEATURE_MASK_FPSSE;
+ } else {
size = sizeof(struct fregs_state);
+ fpu_user_cfg.legacy_features = XFEATURE_MASK_FP;
+ }
fpu_kernel_cfg.max_size = size;
fpu_kernel_cfg.default_size = size;
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