lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 26 Oct 2021 11:38:44 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Richard Zhu <hongxing.zhu@....com>
Cc:     "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        dl-linux-imx <linux-imx@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>
Subject: Re: [RESEND v2 4/5] PCI: imx6: Fix the clock reference handling
 unbalance when link never came up

On Fri, Oct 22, 2021 at 08:02:17AM +0000, Richard Zhu wrote:
> <snipped ...>
> > >
> > > > > -static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) -{
> > > > > -	clk_disable_unprepare(imx6_pcie->pcie);
> > > > > -	clk_disable_unprepare(imx6_pcie->pcie_phy);
> > > > > -	clk_disable_unprepare(imx6_pcie->pcie_bus);
> > > > > -
> > > > > -	switch (imx6_pcie->drvdata->variant) {
> > > > > -	case IMX6SX:
> > > > > -		clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
> > > > > -		break;
> > > > > -	case IMX7D:
> > > > > -		regmap_update_bits(imx6_pcie->iomuxc_gpr,
> > IOMUXC_GPR12,
> > > > > -				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
> > > > > -				   IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
> > > > > -		break;
> > > > > -	case IMX8MQ:
> > > > > -		clk_disable_unprepare(imx6_pcie->pcie_aux);
> > > > > -		break;
> > > > > -	default:
> > > > > -		break;
> > >
> > > While you're at it, this "default: break;" thing is pointless.
> > > Normally it's better to just *move* something without changing it at
> > > all, but this is such a simple thing I think you could drop this at
> > > the same time as the move.
> > >
> > [Richard Zhu] Okay, got that. Would remove the "default:break" later. Thanks.
> [Richard Zhu] I figure out that the default:break is required by
> IMX6Q/IMX6QP.  So I just don't drop them in v3 patch-set.

That makes no sense.  The code is:

  +static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
  +{
  +       clk_disable_unprepare(imx6_pcie->pcie);
  +       clk_disable_unprepare(imx6_pcie->pcie_phy);
  +       clk_disable_unprepare(imx6_pcie->pcie_bus);
  +
  +       switch (imx6_pcie->drvdata->variant) {
  +       case IMX6SX:
  +               clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
  +               break;
  +       case IMX7D:
  +               regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
  +                                  IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
  +                                  IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
  +               break;
  +       case IMX8MQ:
  +               clk_disable_unprepare(imx6_pcie->pcie_aux);
  +               break;
  +       default:
  +               break;
  +       }
  +}

Why do you think it makes a difference to remove the
"default: break;"?  There is no executable code after it.
I don't see how IMX6Q/IMX6QP could depend on the default
case.

BTW, I feel like a broken record, but your v3 posting still has
inconsistent subject line capitalization:

  PCI: imx6: move the clock disable function to a proper place
  PCI: dwc: add a new callback host exit function into host ops

It would be nice if they were consistent and contained more specific
information, e.g.,

  PCI: imx6: Move imx6_pcie_clk_disable() earlier
  PCI: dwc: Add dw_pcie_host_ops.host_exit() callback

Bjorn

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ