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Date:   Wed, 27 Oct 2021 12:54:09 +0200 (CEST)
From:   Richard Weinberger <richard@....at>
To:     shiva linuxworks <shiva.linuxworks@...il.com>
Cc:     Tudor Ambarus <tudor.ambarus@...rochip.com>,
        Michael Walle <michael@...le.cc>,
        Pratyush Yadav <p.yadav@...com>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Vignesh Raghavendra <vigneshr@...com>,
        linux-mtd <linux-mtd@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Shivamurthy Shastri <sshivamurthy@...ron.com>
Subject: Re: [PATCH 0/4] enabling Advanced protection and security features

----- Ursprüngliche Mail -----
> Von: "shiva linuxworks" <shiva.linuxworks@...il.com>
> An: "Tudor Ambarus" <tudor.ambarus@...rochip.com>, "Michael Walle" <michael@...le.cc>, "Pratyush Yadav"
> <p.yadav@...com>, "Miquel Raynal" <miquel.raynal@...tlin.com>, "richard" <richard@....at>, "Vignesh Raghavendra"
> <vigneshr@...com>
> CC: "linux-mtd" <linux-mtd@...ts.infradead.org>, "linux-kernel" <linux-kernel@...r.kernel.org>, "Shivamurthy Shastri"
> <sshivamurthy@...ron.com>
> Gesendet: Mittwoch, 27. Oktober 2021 12:33:48
> Betreff: [PATCH 0/4] enabling Advanced protection and security features

> From: Shivamurthy Shastri <sshivamurthy@...ron.com>
> 
> Standard protection features in SPI NOR flashes are legacy and offer a
> simple way to protect the memory array against accidental or unwanted
> modification of its content.
> 
> These patches enable the support for advanced sector protection which
> protects memory from accidentally corrupting code and data stored, and
> it also prevents malicious attacks that could intentionally modify the
> code or data stored in the memory.
> 
> Micron Flashes offer some of the advanced protection methods using
> volatile lock bits, non-volatile lock bits, global freeze bits, and
> password.

Can you please point us to the technical documentation of these features?
I'm especially interested in the password feature.

Thanks,
//richard

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