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Message-ID: <dcf9431eb760424bbf01b0cc8bff6d92@AcuMS.aculab.com>
Date:   Wed, 27 Oct 2021 11:56:14 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Paul Heidekrüger' 
        <paul.heidekrueger@...tum.de>,
        "paulmck@...nel.org" <paulmck@...nel.org>,
        "will@...nel.org" <will@...nel.org>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "boqun.feng@...il.com" <boqun.feng@...il.com>,
        "stern@...land.harvard.edu" <stern@...land.harvard.edu>,
        "parri.andrea@...il.com" <parri.andrea@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "llvm@...ts.linux.dev" <llvm@...ts.linux.dev>
CC:     "elver@...gle.com" <elver@...gle.com>,
        "charalampos.mainas@...il.com" <charalampos.mainas@...il.com>,
        "pramod.bhatotia@...tum.de" <pramod.bhatotia@...tum.de>
Subject: RE: Potentially Broken Address Dependency via test_bit() When
 Compiling With Clang

From: Paul Heidekrüger
> Sent: 27 October 2021 11:20
> 
> For my bachelor thesis, I have been working on the infamous problem of
> potentially broken dependency orderings in the Linux kernel. I'm being
> advised by Marco Elver, Charalampos Mainas, Pramod Bhatotia (Cc'd).
> 
> For context, see:
> https://linuxplumbersconf.org/event/7/contributions/821/attachments/598/1075/LPC_2020_--
> _Dependency_ordering.pdf
> 
> Our approach consists of two LLVM compiler passes which annotate
> dependencies in unoptimised intermediate representation (IR) and verify
> the annotated dependencies in optimised IR. ATM, the passes only
> recognise a subset of address dependencies - everything is still WIP ;-)
> 
> We have been cross-compiling with a slightly modified version of
> allyesconfig for arm64, and the passes have now found a case that we
> would like to share with LKML for feedback: an address dependency being
> broken (?) through compiler optimisations in
> fs/afs/addr_list.c::afs_iterate_addresses().
> 
> Address dependency in source code, lines 373 - 375 in fs/afs/addr_list.c:
> 
> > [...]
> >   index = READ_ONCE(ac->alist->preferred);
> >   if (test_bit(index, &set))
> >     goto selected;
> > [...]
> 
> where test_bit() expands to the following in
> include/asm-generic/bitops/non-atomic.h, lines 115 - 122:
> 
> > static __always_inline int
> > arch_test_bit(unsigned int nr, const volatile unsigned long *addr)
> > {
> >   return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
> > }
> > #define test_bit arch_test_bit

I don't think there is expected to be an address dependency.
The READ_ONCE() is needed to ensure the generated code doesn't use
two different values for 'index' - eg for 'nr' inside arch_test_bit().

	David

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