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Message-ID: <facef42345435d82600aca87d9b020fa073506ce.camel@mediatek.com>
Date: Thu, 28 Oct 2021 13:54:12 +0800
From: Chaotian Jing <chaotian.jing@...iatek.com>
To: Wenbin Mei <wenbin.mei@...iatek.com>,
Ulf Hansson <ulf.hansson@...aro.org>
CC: Matthias Brugger <matthias.bgg@...il.com>,
Chun-Hung Wu <chun-hung.wu@...iatek.com>,
Yong Mao <yong.mao@...iatek.com>, <linux-mmc@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<srv_heupstream@...iatek.com>, <stable@...r.kernel.org>
Subject: Re: [PATCH] mmc: mediatek: move cqhci init behind ungate clock
On Thu, 2021-10-28 at 10:20 +0800, Wenbin Mei wrote:
> We must enable clock before cqhci init, because crypto needs
> read information from CQHCI registers, otherwise, it will hang
> in MediaTek mmc host controller.
>
> Signed-off-by: Wenbin Mei <wenbin.mei@...iatek.com>
Acked-by: Chaotian Jing <chaotian.jing@...iatek.com>
> Fixes: 88bd652b3c74 ("mmc: mediatek: command queue support")
> Cc: stable@...r.kernel.org
> ---
> drivers/mmc/host/mtk-sd.c | 38 +++++++++++++++++++----------------
> ---
> 1 file changed, 19 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
> index b124cfee05a1..943940b44e83 100644
> --- a/drivers/mmc/host/mtk-sd.c
> +++ b/drivers/mmc/host/mtk-sd.c
> @@ -2656,6 +2656,25 @@ static int msdc_drv_probe(struct
> platform_device *pdev)
> host->dma_mask = DMA_BIT_MASK(32);
> mmc_dev(mmc)->dma_mask = &host->dma_mask;
>
> + host->timeout_clks = 3 * 1048576;
> + host->dma.gpd = dma_alloc_coherent(&pdev->dev,
> + 2 * sizeof(struct mt_gpdma_desc),
> + &host->dma.gpd_addr, GFP_KERNEL);
> + host->dma.bd = dma_alloc_coherent(&pdev->dev,
> + MAX_BD_NUM * sizeof(struct
> mt_bdma_desc),
> + &host->dma.bd_addr, GFP_KERNEL);
> + if (!host->dma.gpd || !host->dma.bd) {
> + ret = -ENOMEM;
> + goto release_mem;
> + }
> + msdc_init_gpd_bd(host, &host->dma);
> + INIT_DELAYED_WORK(&host->req_timeout, msdc_request_timeout);
> + spin_lock_init(&host->lock);
> +
> + platform_set_drvdata(pdev, mmc);
> + msdc_ungate_clock(host);
> + msdc_init_hw(host);
> +
> if (mmc->caps2 & MMC_CAP2_CQE) {
> host->cq_host = devm_kzalloc(mmc->parent,
> sizeof(*host->cq_host),
> @@ -2676,25 +2695,6 @@ static int msdc_drv_probe(struct
> platform_device *pdev)
> mmc->max_seg_size = 64 * 1024;
> }
>
> - host->timeout_clks = 3 * 1048576;
> - host->dma.gpd = dma_alloc_coherent(&pdev->dev,
> - 2 * sizeof(struct mt_gpdma_desc),
> - &host->dma.gpd_addr, GFP_KERNEL);
> - host->dma.bd = dma_alloc_coherent(&pdev->dev,
> - MAX_BD_NUM * sizeof(struct
> mt_bdma_desc),
> - &host->dma.bd_addr, GFP_KERNEL);
> - if (!host->dma.gpd || !host->dma.bd) {
> - ret = -ENOMEM;
> - goto release_mem;
> - }
> - msdc_init_gpd_bd(host, &host->dma);
> - INIT_DELAYED_WORK(&host->req_timeout, msdc_request_timeout);
> - spin_lock_init(&host->lock);
> -
> - platform_set_drvdata(pdev, mmc);
> - msdc_ungate_clock(host);
> - msdc_init_hw(host);
> -
> ret = devm_request_irq(&pdev->dev, host->irq, msdc_irq,
> IRQF_TRIGGER_NONE, pdev->name, host);
> if (ret)
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