linux-kernel - [PATCH v4 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name properties

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Message-Id: <1635406037-20900-4-git-send-email-hongxing.zhu@nxp.com>
Date:   Thu, 28 Oct 2021 15:27:12 +0800
From:   Richard Zhu <hongxing.zhu@....com>
To:     l.stach@...gutronix.de, marcel.ziswiler@...adex.com,
        tharvey@...eworks.com, kishon@...com, vkoul@...nel.org,
        robh@...nel.org, galak@...nel.crashing.org, shawnguo@...nel.org
Cc:     linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        kernel@...gutronix.de, linux-imx@....com,
        Richard Zhu <hongxing.zhu@....com>
Subject: [PATCH v4 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name properties

i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties
in the binding document.

Signed-off-by: Richard Zhu <hongxing.zhu@....com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>
---
 Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index 2911e565b260..46b5446f5791 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -128,6 +128,12 @@ properties:
     enum: [1, 2, 3, 4]
     default: 1
 
+  phys:
+    maxItems: 1
+
+  phy-names:
+    const: pcie-phy
+
   reset-gpio:
     description: Should specify the GPIO for controlling the PCI bus device
       reset signal. It's not polarity aware and defaults to active-low reset
-- 
2.25.1