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Message-ID: <20211029120631.a7p6d6hurefz4emt@soft-dev3-1.localhost>
Date: Fri, 29 Oct 2021 14:06:31 +0200
From: Horatiu Vultur <horatiu.vultur@...rochip.com>
To: Rob Herring <robh@...nel.org>
CC: <mturquette@...libre.com>, <sboyd@...nel.org>,
<nicolas.ferre@...rochip.com>, <kavyasree.kotagiri@...rochip.com>,
<eugen.hristev@...rochip.com>, <linux-clk@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH 1/3] dt-bindings: clock: lan966x: Extend for clock
gate support
The 10/26/2021 22:08, Rob Herring wrote:
Hi Rob,
>
> On Tue, Oct 19, 2021 at 10:44:47AM +0200, Horatiu Vultur wrote:
> > It is required to add a new resource to be able to access the clock gate
> > registers. Now that we have 2 resources, add also reg-names property to
> > make more clear.
>
> It is an ABI breakage to require 2 reg entries. If that's okay for this
> binding, you need to explain why. The binding requiring 2 so that DT
> files get updated, but the driver allowing for 1 is okay.
I will make the resource optional not to break any ABI.
>
> >
> > Signed-off-by: Horatiu Vultur <horatiu.vultur@...rochip.com>
> > ---
> > .../bindings/clock/microchip,lan966x-gck.yaml | 13 +++++++++++--
> > 1 file changed, 11 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml b/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
> > index fca83bd68e26..047c77e049f1 100644
> > --- a/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
> > +++ b/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
> > @@ -19,7 +19,14 @@ properties:
> > const: microchip,lan966x-gck
> >
> > reg:
> > - maxItems: 1
> > + items:
> > + - description: core registers
> > + - description: gate registers
> > +
> > + reg-names:
> > + items:
> > + - const: core
> > + - const: gate
> >
> > clocks:
> > items:
> > @@ -39,6 +46,7 @@ properties:
> > required:
> > - compatible
> > - reg
> > + - reg-names
> > - clocks
> > - clock-names
> > - '#clock-cells'
> > @@ -52,6 +60,7 @@ examples:
> > #clock-cells = <1>;
> > clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
> > clock-names = "cpu", "ddr", "sys";
> > - reg = <0xe00c00a8 0x38>;
> > + reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>;
> > + reg-names = "core", "gate";
> > };
> > ...
> > --
> > 2.33.0
> >
> >
--
/Horatiu
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