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Message-ID: <YXtVGrG8HcEJ/gLf@robh.at.kernel.org>
Date: Thu, 28 Oct 2021 20:57:46 -0500
From: Rob Herring <robh@...nel.org>
To: Eugen Hristev <eugen.hristev@...rochip.com>
Cc: linux-media@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
jacopo@...ndi.org, laurent.pinchart@...asonboard.com,
sakari.ailus@....fi, nicolas.ferre@...rochip.com
Subject: Re: [PATCH 02/21] dt-bindings: media: atmel: csi2dc: add bindings
for microchip csi2dc
On Fri, Oct 22, 2021 at 10:52:28AM +0300, Eugen Hristev wrote:
> Add bindings documentation for Microchip CSI2 Demultiplexer controller.
>
> CSI2DC is a demultiplexer from Synopsys IDI interface specification to
> parallel interface connection or direct memory access.
>
> Signed-off-by: Eugen Hristev <eugen.hristev@...rochip.com>
> ---
> Changes in this version :
> - fixed 'sink' name to be actually source.
> - added dma properties and example with dma
>
> Previous change log:
> Changes in v5:
> - modified bindings as per Rob Herring review
>
> Changes in v4:
> - Removed property for inter-line-delay and for clock continuous/non-continuous
> - Removed virtual channel by reg for second endpoint
>
> Changes in v3:
> - Removed some text from description, as it was explained in the schema
> - fixed other things as per Rob's review
> - moved some text inside the schema, like the clock description
>
> Changes in v2:
> - fixed warnings reported by dt_binding_check
>
>
> .../bindings/media/microchip,csi2dc.yaml | 149 ++++++++++++++++++
> 1 file changed, 149 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/microchip,csi2dc.yaml
>
> diff --git a/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml b/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml
> new file mode 100644
> index 000000000000..d317478908d0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml
> @@ -0,0 +1,149 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/microchip,csi2dc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip CSI2 Demux Controller (CSI2DC)
> +
> +maintainers:
> + - Eugen Hristev <eugen.hristev@...rochip.com>
> +
> +description:
> + CSI2DC - Camera Serial Interface 2 Demux Controller
> +
> + CSI2DC is a hardware block that receives incoming data from an IDI interface
> + and filters packets based on their data type and virtual channel identifier,
> + then converts the byte stream into a cross clock domain to a pixel stream
> + to a parallel interface that can be read by a sensor controller.
> + IDI interface is Synopsys proprietary.
> +
> + CSI2DC provides two pipes, one video pipe and one data pipe. Video pipe
> + is connected to a sensor controller and the data pipe is accessible
> + as a DMA slave port to a DMA controller.
> +
> + CSI2DC supports a single 'port' node as a sink port with Synopsys 32-bit
> + IDI interface. The connected endpoint must be a IDI interface compatible
> + device , that can provide 32-bit IDI interface connection as source port.
> + For graph video endpoints please refer to the bindings defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt.
> + This port is mandatory.
> +
> + CSI2DC supports one 'port' node as source port with parallel interface.
> + This is called video pipe.
> + This port has an 'endpoint' that can be connected to a sink port of another
> + controller (next in pipeline).
> + Please refer to the bindings defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt.
> +
> + CSI2DC also supports direct access to the data through AHB, via DMA channel,
> + called data pipe.
> + Because of this, the source 'port' child node (second) is not mandatory.
> + If the source 'port' child node is missing, only data pipe is available.
> + For data pipe to be available, a dma controller must be referenced.
> +
> +properties:
> + compatible:
> + const: microchip,sama7g5-csi2dc
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 2
> +
> + clock-names:
> + description:
> + CSI2DC must have two clocks to function correctly. One clock is the
> + peripheral clock for the inside functionality of the hardware block.
> + This is named 'pclk'. The second clock must be the cross domain clock,
> + in which CSI2DC will perform clock crossing. This clock must be fed
> + by the next controller in pipeline, which usually is a sensor controller.
> + Normally this clock should be given by this sensor controller who
> + is also a clock source. This clock is named 'scck', sensor controller clock.
> + items:
> + - const: pclk
> + - const: scck
> +
> + dmas:
> + maxItems: 1
> +
> + dma-names:
> + const: rx
> +
> + ports:
> + type: object
> + description:
> + List of ports
> +
> + properties:
> + port@0:
> + type: object
> + description:
> + Input port node, single endpoint describing the input port.
> + port@1:
> + type: object
> + description:
> + Output port node, single endpoint, describing the output port.
These need references to graph.yaml schema. See examples in the tree
now.
> +
> +additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - ports
> +
> +examples:
> + # Example for connecting to a parallel sensor controller block
> + - |
> + csi2dc@...04000 {
> + compatible = "microchip,sama7g5-csi2dc";
> + reg = <0xe1404000 0x500>;
> + clocks = <&pclk>, <&scck>;
> + clock-names = "pclk", "scck";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>; /* must be 0, first child port */
> + csi2dc_in: endpoint { /* input from IDI interface */
> + remote-endpoint = <&csi2host_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>; /* must be 1, second child port */
> + csi2dc_out: endpoint {
> + remote-endpoint = <&xisc_in>; /* output to sensor controller */
> + };
> + };
> + };
> + };
> +
> + # Example for connecting to a DMA master as an AHB slave
> + - |
> + #include <dt-bindings/dma/at91.h>
> + csi2dc@...04000 {
> + compatible = "microchip,sama7g5-csi2dc";
> + reg = <0xe1404000 0x500>;
> + clocks = <&pclk>, <&scck>;
> + clock-names = "pclk", "scck";
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(34)>;
> + dma-names = "rx";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>; /* must be 0, first child port */
> + csi2dc_input: endpoint { /* input from IDI interface */
> + remote-endpoint = <&csi2host_out>;
> + };
> + };
> + };
> + };
> +
> +...
> --
> 2.25.1
>
>
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