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Message-Id: <20211029203016.2093610-3-kaperez@linux.microsoft.com>
Date: Fri, 29 Oct 2021 13:30:16 -0700
From: Katherine Perez <kaperez@...ux.microsoft.com>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, balbi@...nel.org
Subject: [PATCH 2/2] arm64: dts: sm8350: fix tlmm base address
TLMM controller base address is incorrect and will hang on some platforms.
Fix by giving the correct address.
Signed-off-by: Katherine Perez <kaperez@...ux.microsoft.com>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index e91cd8a5e535..a1d0c51a6da7 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -815,9 +815,9 @@ spmi_bus: spmi@...0000 {
#interrupt-cells = <4>;
};
- tlmm: pinctrl@...0000 {
+ tlmm: pinctrl@...0000 {
compatible = "qcom,sm8350-tlmm";
- reg = <0 0x0f100000 0 0x300000>;
+ reg = <0 0x0f000000 0 0x300000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
--
2.31.1
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