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Message-ID: <202110310455.FbsMcmr3-lkp@intel.com>
Date: Sun, 31 Oct 2021 04:44:03 +0800
From: kernel test robot <lkp@...el.com>
To: Romain Perier <romain.perier@...il.com>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org
Subject: [chenxing:rperier-timer 14/16]
drivers/clocksource/timer-msc313e.c:44:28: error: field 'delay' has
incomplete type
tree: git://github.com/linux-chenxing/linux.git rperier-timer
head: 2c2964b90b3016b69281286af5e9559ccb6fbbcc
commit: fcb8c30c9d205fa8600690505ee8df8ff9c37351 [14/16] clocksource: Add support for timekeeping on MStar MSC313e (WIP)
config: riscv-allyesconfig (attached as .config)
compiler: riscv64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/linux-chenxing/linux/commit/fcb8c30c9d205fa8600690505ee8df8ff9c37351
git remote add chenxing git://github.com/linux-chenxing/linux.git
git fetch --no-tags chenxing rperier-timer
git checkout fcb8c30c9d205fa8600690505ee8df8ff9c37351
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All errors (new ones prefixed by >>):
>> drivers/clocksource/timer-msc313e.c:44:28: error: field 'delay' has incomplete type
44 | struct delay_timer delay;
| ^~~~~
drivers/clocksource/timer-msc313e.c: In function 'msc313e_delay_init':
>> drivers/clocksource/timer-msc313e.c:209:9: error: implicit declaration of function 'register_current_timer_delay' [-Werror=implicit-function-declaration]
209 | register_current_timer_delay(&msc313e_delay->delay);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
vim +/delay +44 drivers/clocksource/timer-msc313e.c
41
42 struct msc313e_delay {
43 void __iomem * base;
> 44 struct delay_timer delay;
45 };
46
47 static struct timer_of *msc313e_clkevt;
48 static void __iomem *msc313e_clksrc;
49 static struct msc313e_delay *msc313e_delay;
50
51 #define to_msc313e_timer(ptr) container_of(ptr, struct msc313e_timer, clksrc)
52
53 static int msc313e_timer_clkevt_shutdown(struct clock_event_device *evt)
54 {
55 struct timer_of *timer = to_timer_of(evt);
56 u16 reg;
57
58 pr_info("shutdown\n");
59
60 reg = readw(timer->of_base.base + REG_CTRL);
61 reg &= ~CTRL_ENABLE;
62 writew(reg, timer->of_base.base + REG_CTRL);
63
64 return 0;
65 }
66
67 static int msc313e_timer_clkevt_set_oneshot(struct clock_event_device *evt)
68 {
69 pr_info("%s: one shot\n", __func__);
70
71 //result = readw_relaxed(timer->oftimer.of_base.base + REG_COUNTER_LOW);
72
73 return 0;
74 }
75
76 static int msc313e_timer_set_periodic(struct clock_event_device *evt)
77 {
78 struct timer_of *timer = to_timer_of(evt);
79
80 pr_info("periodic\n");
81
82 writew(CTRL_ENABLE | CTRL_IRQ, timer->of_base.base + REG_CTRL);
83 return 0;
84 }
85
86 static int msc313e_timer_clkevt_next_event(unsigned long evt, struct clock_event_device *clkevt)
87 {
88 pr_info("%s: next\n", __func__);
89
90 return 0;
91 }
92
93 static irqreturn_t msc313e_timer_clkevt_irq(int irq, void *dev_id)
94 {
95 struct clock_event_device *evt = dev_id;
96
97 evt->event_handler(evt);
98
99 return IRQ_HANDLED;
100 }
101
102 static u64 msc313e_timer_read(struct clocksource *cs)
103 {
104 u64 result = 0;
105 u16 low;
106 u16 high;
107
108 low = readw(msc313e_clksrc + REG_COUNTER_LOW);
109 high = readw(msc313e_clksrc + REG_COUNTER_HIGH);
110
111 result = (high << 16 ) | low;
112 return result & cs->mask;
113 }
114
115 static unsigned long msc313e_read_delay_timer_read(void)
116 {
117 unsigned long result;
118
119 result = readw(msc313e_delay->base + REG_COUNTER_LOW);
120 result |= readw(msc313e_delay->base + REG_COUNTER_HIGH) << 16;
121
122 return result;
123 }
124
125 static u64 msc313e_timer_sched_clock_read(void)
126 {
127 u64 result;
128
129 result = readw(msc313e_clksrc + REG_COUNTER_LOW);
130 result |= readw(msc313e_clksrc + REG_COUNTER_HIGH) << 16;
131
132 return result;
133 }
134
135 static int __init msc313e_clkevt_init(struct device_node *np)
136 {
137 int ret;
138
139 msc313e_clkevt = kzalloc(sizeof(struct timer_of), GFP_KERNEL);
140 if (!msc313e_clkevt)
141 return -ENOMEM;
142
143 msc313e_clkevt->flags = TIMER_OF_IRQ | TIMER_OF_CLOCK | TIMER_OF_BASE,
144 msc313e_clkevt->clkevt.name = TIMER_NAME,
145 msc313e_clkevt->clkevt.rating = 300,
146 msc313e_clkevt->clkevt.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
147 msc313e_clkevt->clkevt.set_state_shutdown = msc313e_timer_clkevt_shutdown;
148 msc313e_clkevt->clkevt.set_state_periodic = msc313e_timer_set_periodic;
149 msc313e_clkevt->clkevt.set_state_oneshot = msc313e_timer_clkevt_set_oneshot;
150 msc313e_clkevt->clkevt.tick_resume = msc313e_timer_clkevt_shutdown;
151 msc313e_clkevt->clkevt.set_next_event = msc313e_timer_clkevt_next_event;
152 msc313e_clkevt->clkevt.cpumask = cpu_possible_mask;
153 msc313e_clkevt->of_irq.handler = msc313e_timer_clkevt_irq;
154 msc313e_clkevt->of_irq.flags = IRQF_TIMER | IRQF_IRQPOLL;
155
156 ret = timer_of_init(np, msc313e_clkevt);
157 if (ret)
158 return ret;
159
160 clockevents_config_and_register(&msc313e_clkevt->clkevt, timer_of_rate(msc313e_clkevt),
161 TIMER_SYNC_TICKS, 0xffffffff);
162 return 0;
163 }
164
165 static int __init msc313e_clksrc_init(struct device_node *np)
166 {
167 struct timer_of to = { 0 };
168 int ret;
169 u16 reg;
170
171 to.flags = TIMER_OF_BASE | TIMER_OF_CLOCK;
172 ret = timer_of_init(np, &to);
173 if (ret)
174 return ret;
175
176 msc313e_clksrc = timer_of_base(&to);
177 reg = readw(msc313e_clksrc + REG_CTRL);
178 reg |= CTRL_ENABLE;
179 writew(reg, msc313e_clksrc + REG_CTRL);
180
181 sched_clock_register(msc313e_timer_sched_clock_read, 32, timer_of_rate(&to));
182 return clocksource_mmio_init(timer_of_base(&to), TIMER_NAME, timer_of_rate(&to), 300, 32,
183 msc313e_timer_read);
184 }
185
186 static int __init msc313e_delay_init(struct device_node *np)
187 {
188 struct timer_of to = { 0 };
189 int ret;
190 u16 reg;
191
192 to.flags = TIMER_OF_BASE | TIMER_OF_CLOCK;
193 ret = timer_of_init(np, &to);
194 if (ret)
195 return ret;
196
197 msc313e_delay = kzalloc(sizeof(struct msc313e_delay), GFP_KERNEL);
198 if (!msc313e_delay)
199 return -ENOMEM;
200
201 msc313e_delay->base = timer_of_base(&to);
202 msc313e_delay->delay.read_current_timer = msc313e_read_delay_timer_read;
203 msc313e_delay->delay.freq = timer_of_rate(&to);
204
205 reg = readw(msc313e_delay->base + REG_CTRL);
206 reg |= CTRL_ENABLE;
207 writew(reg, msc313e_delay->base + REG_CTRL);
208
> 209 register_current_timer_delay(&msc313e_delay->delay);
210
211 return 0;
212 }
213
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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