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Message-ID: <20211101084213.r5fgmkscyemjfdcj@soft-dev3-1.localhost>
Date: Mon, 1 Nov 2021 09:42:13 +0100
From: Horatiu Vultur <horatiu.vultur@...rochip.com>
To: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
CC: <robh+dt@...nel.org>, <linus.walleij@...aro.org>,
<linux-gpio@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <UNGLinuxDriver@...rochip.com>
Subject: Re: [PATCH v2 2/2] pinctrl: ocelot: Extend support for lan966x
Hi Kavya,
The 11/01/2021 12:16, Kavyasree Kotagiri wrote:
> This patch extends pinctrl-ocelot driver to support also the
> lan966x. Register layout is same as ocelot. It has 78 GPIOs.
> Requires 3 registers ALT0, ALT1, ALT2 to configure ALT mode.
>
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
> ---
> drivers/pinctrl/pinctrl-ocelot.c | 416 +++++++++++++++++++++++++++++++
> 1 file changed, 416 insertions(+)
>
> diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
> index 0a36ec8775a3..751eb38f93da 100644
> --- a/drivers/pinctrl/pinctrl-ocelot.c
> +++ b/drivers/pinctrl/pinctrl-ocelot.c
> @@ -57,16 +57,71 @@ enum {
> #define OCELOT_FUNC_PER_PIN 4
>
> + LAN966X_PIN(68),
> + LAN966X_PIN(69),
> + LAN966X_PIN(70),
> + LAN966X_PIN(71),
> + LAN966X_PIN(72),
> + LAN966X_PIN(73),
> + LAN966X_PIN(74),
> + LAN966X_PIN(75),
> + LAN966X_PIN(76),
> + LAN966X_PIN(77),
> +};
> +
> +
Here is an extra new line.
> static int ocelot_get_functions_count(struct pinctrl_dev *pctldev)
> {
> return ARRAY_SIZE(ocelot_function_names);
> @@ -709,6 +1056,9 @@ static int ocelot_pin_function_idx(struct ocelot_pinctrl *info,
> for (i = 0; i < OCELOT_FUNC_PER_PIN; i++) {
> if (function == p->functions[i])
> return i;
> +
> + if (function == p->a_functions[i])
> + return i + OCELOT_FUNC_PER_PIN;
> }
>
> return -1;
> @@ -744,6 +1094,36 @@ static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev,
> return 0;
> }
>
> +
> static int ocelot_pctl_get_groups_count(struct pinctrl_dev *pctldev)
> {
> struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
> @@ -1074,6 +1480,14 @@ static struct pinctrl_desc sparx5_desc = {
> .npins = ARRAY_SIZE(sparx5_pins),
> .pctlops = &ocelot_pctl_ops,
> .pmxops = &ocelot_pmx_ops,
> +};
> +
> +static struct pinctrl_desc lan966x_desc = {
> + .name = "lan966x-pinctrl",
> + .pins = lan966x_pins,
> + .npins = ARRAY_SIZE(lan966x_pins),
> + .pctlops = &ocelot_pctl_ops,
> + .pmxops = &lan966x_pmx_ops,
This change removes .confops and .owner from sparx5 which is a mistake.
> .confops = &ocelot_confops,
> .owner = THIS_MODULE,
> };
> @@ -1114,6 +1528,7 @@ static int ocelot_create_group_func_map(struct device *dev,
> return 0;
> }
>
> +
Here is an extra new line.
> static int ocelot_pinctrl_register(struct platform_device *pdev,
> struct ocelot_pinctrl *info)
> {
> @@ -1337,6 +1752,7 @@ static const struct of_device_id ocelot_pinctrl_of_match[] = {
> { .compatible = "mscc,ocelot-pinctrl", .data = &ocelot_desc },
> { .compatible = "mscc,jaguar2-pinctrl", .data = &jaguar2_desc },
> { .compatible = "microchip,sparx5-pinctrl", .data = &sparx5_desc },
> + { .compatible = "microchip,lan966x-pinctrl", .data = &lan966x_desc },
> {},
> };
>
> --
> 2.17.1
>
--
/Horatiu
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