linux-kernel - Re: [PATCH v3 08/21] cpufreq: amd: add acpi cppc function as the backend for legacy processors

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Message-ID: <YX+tM7FOQBKqHetw@hr-amd>
Date:   Mon, 1 Nov 2021 17:02:43 +0800
From:   Huang Rui <ray.huang@....com>
To:     "Limonciello, Mario" <Mario.Limonciello@....com>
Cc:     "Rafael J . Wysocki" <rafael.j.wysocki@...el.com>,
        Viresh Kumar <viresh.kumar@...aro.org>,
        Shuah Khan <skhan@...uxfoundation.org>,
        Borislav Petkov <bp@...e.de>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...nel.org>,
        Giovanni Gherdovich <ggherdovich@...e.cz>,
        "linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
        "Sharma, Deepak" <Deepak.Sharma@....com>,
        "Deucher, Alexander" <Alexander.Deucher@....com>,
        Steven Noonan <steven@...vesoftware.com>,
        "Fontenot, Nathan" <Nathan.Fontenot@....com>,
        "Su, Jinzhou (Joe)" <Jinzhou.Su@....com>,
        "Du, Xiaojian" <Xiaojian.Du@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "x86@...nel.org" <x86@...nel.org>
Subject: Re: [PATCH v3 08/21] cpufreq: amd: add acpi cppc function as the
 backend for legacy processors

On Fri, Oct 29, 2021 at 10:20:09PM +0800, Limonciello, Mario wrote:
> On 10/29/2021 08:02, Huang Rui wrote:
> > In some old Zen based processors, they are using the shared memory that
> > exposed from ACPI SBIOS.
> 
> I don't think this is only "old" processors.  I think there are "new" 
> processors that just don't happen to implement the MSR too.
> 

Yes, I will correct the description.

> > 
> > Signed-off-by: Jinzhou Su <Jinzhou.Su@....com>
> > Signed-off-by: Huang Rui <ray.huang@....com>
> > ---
> >   drivers/cpufreq/amd-pstate.c | 58 ++++++++++++++++++++++++++++++++----
> >   1 file changed, 53 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> > index 55ff03f85608..d399938d6d85 100644
> > --- a/drivers/cpufreq/amd-pstate.c
> > +++ b/drivers/cpufreq/amd-pstate.c
> > @@ -73,6 +73,19 @@ static inline int pstate_enable(bool enable)
> >   	return wrmsrl_safe(MSR_AMD_CPPC_ENABLE, enable ? 1 : 0);
> >   }
> >   
> > +static int cppc_enable(bool enable)
> > +{
> > +	int cpu, ret = 0;
> > +
> > +	for_each_online_cpu(cpu) {
> 
> I wonder if this should also be changed to present CPU instead of 
> offline CPU.  Otherwise could this turn into a situation that the user 
> starts with some CPU's offlined and enables them later but this doesn't 
> end up applying to the CPUs that were started offlined and changed?
> 

Yes, make sense. It is actually similiar with previous acpi_cpc_valid fix
patch. I will update it in V4.

Thanks,
Ray