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Date: Mon, 1 Nov 2021 15:24:50 +0530
From: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
To: <robh+dt@...nel.org>, <linus.walleij@...aro.org>
CC: <linux-gpio@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <UNGLinuxDriver@...rochip.com>,
<Kavyasree.Kotagiri@...rochip.com>
Subject: [PATCH v3 1/2] dt-bindings: pinctrl: ocelot: add lan966x SoC support
Add documentation for the compatible designated for lan966x.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
---
v2 -> v3:
- No changes.
v1 -> v2:
- Use consistent name lan966x in commit description
.../devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
index db99bd95d423..3bb76487669f 100644
--- a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
@@ -4,7 +4,8 @@ Microsemi Ocelot pin controller Device Tree Bindings
Required properties:
- compatible : Should be "mscc,ocelot-pinctrl",
"mscc,jaguar2-pinctrl", "microchip,sparx5-pinctrl",
- "mscc,luton-pinctrl" or "mscc,serval-pinctrl"
+ "mscc,luton-pinctrl", "mscc,serval-pinctrl" or
+ "microchip,lan966x-pinctrl"
- reg : Address and length of the register set for the device
- gpio-controller : Indicates this device is a GPIO controller
- #gpio-cells : Must be 2.
--
2.17.1
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