| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Mon, 01 Nov 2021 18:19:09 +0200
From: Maxim Levitsky <mlevitsk@...hat.com>
To: Vitaly Kuznetsov <vkuznets@...hat.com>,
Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org
Cc: Kieran Bingham <kbingham@...nel.org>,
Jan Kiszka <jan.kiszka@...mens.com>,
Andrew Jones <drjones@...hat.com>,
Jonathan Corbet <corbet@....net>,
Sean Christopherson <seanjc@...gle.com>,
Ingo Molnar <mingo@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
Johannes Berg <johannes.berg@...el.com>,
Wanpeng Li <wanpengli@...cent.com>,
"H. Peter Anvin" <hpa@...or.com>, Jessica Yu <jeyu@...nel.org>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>,
Yang Weijiang <weijiang.yang@...el.com>,
linux-kernel@...r.kernel.org, Borislav Petkov <bp@...en8.de>,
"open list:KERNEL SELFTEST FRAMEWORK"
<linux-kselftest@...r.kernel.org>,
"open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
Shuah Khan <shuah@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>
Subject: Re: [PATCH v3 6/6] KVM: selftests: test KVM_GUESTDBG_BLOCKIRQ
On Mon, 2021-11-01 at 16:43 +0100, Vitaly Kuznetsov wrote:
> Paolo Bonzini <pbonzini@...hat.com> writes:
>
> > On 11/08/21 14:29, Maxim Levitsky wrote:
> > > Modify debug_regs test to create a pending interrupt
> > > and see that it is blocked when single stepping is done
> > > with KVM_GUESTDBG_BLOCKIRQ
> > >
> > > Signed-off-by: Maxim Levitsky <mlevitsk@...hat.com>
> > > ---
> > > .../testing/selftests/kvm/x86_64/debug_regs.c | 24 ++++++++++++++++---
> > > 1 file changed, 21 insertions(+), 3 deletions(-)
> >
> > I haven't looked very much at this, but the test fails.
> >
>
> Same here,
>
> the test passes on AMD but fails consistently on Intel:
>
> # ./x86_64/debug_regs
> ==== Test Assertion Failure ====
> x86_64/debug_regs.c:179: run->exit_reason == KVM_EXIT_DEBUG && run->debug.arch.exception == DB_VECTOR && run->debug.arch.pc == target_rip && run->debug.arch.dr6 == target_dr6
> pid=13434 tid=13434 errno=0 - Success
> 1 0x00000000004027c6: main at debug_regs.c:179
> 2 0x00007f65344cf554: ?? ??:0
> 3 0x000000000040294a: _start at ??:?
> SINGLE_STEP[1]: exit 8 exception 1 rip 0x402a25 (should be 0x402a27) dr6 0xffff4ff0 (should be 0xffff4ff0)
>
> (I know I'm late to the party).
Well that is strange. It passes on my intel laptop. Just tested
(kvm/queue + qemu master, compiled today) :-(
It fails on iteration 1 (and there is iteration 0) which I think means that we
start with RIP on sti, and get #DB on start of xor instruction first (correctly),
and then we get #DB again on start of xor instruction again?
Something very strange. My laptop has i7-7600U.
Best regards,
Maxim Levitsky
>
> > Paolo
> >
> > > diff --git a/tools/testing/selftests/kvm/x86_64/debug_regs.c b/tools/testing/selftests/kvm/x86_64/debug_regs.c
> > > index 6097a8283377..5f078db1bcba 100644
> > > --- a/tools/testing/selftests/kvm/x86_64/debug_regs.c
> > > +++ b/tools/testing/selftests/kvm/x86_64/debug_regs.c
> > > @@ -8,12 +8,15 @@
> > > #include <string.h>
> > > #include "kvm_util.h"
> > > #include "processor.h"
> > > +#include "apic.h"
> > >
> > > #define VCPU_ID 0
> > >
> > > #define DR6_BD (1 << 13)
> > > #define DR7_GD (1 << 13)
> > >
> > > +#define IRQ_VECTOR 0xAA
> > > +
> > > /* For testing data access debug BP */
> > > uint32_t guest_value;
> > >
> > > @@ -21,6 +24,11 @@ extern unsigned char sw_bp, hw_bp, write_data, ss_start, bd_start;
> > >
> > > static void guest_code(void)
> > > {
> > > + /* Create a pending interrupt on current vCPU */
> > > + x2apic_enable();
> > > + x2apic_write_reg(APIC_ICR, APIC_DEST_SELF | APIC_INT_ASSERT |
> > > + APIC_DM_FIXED | IRQ_VECTOR);
> > > +
> > > /*
> > > * Software BP tests.
> > > *
> > > @@ -38,12 +46,19 @@ static void guest_code(void)
> > > "mov %%rax,%0;\n\t write_data:"
> > > : "=m" (guest_value) : : "rax");
> > >
> > > - /* Single step test, covers 2 basic instructions and 2 emulated */
> > > + /*
> > > + * Single step test, covers 2 basic instructions and 2 emulated
> > > + *
> > > + * Enable interrupts during the single stepping to see that
> > > + * pending interrupt we raised is not handled due to KVM_GUESTDBG_BLOCKIRQ
> > > + */
> > > asm volatile("ss_start: "
> > > + "sti\n\t"
> > > "xor %%eax,%%eax\n\t"
> > > "cpuid\n\t"
> > > "movl $0x1a0,%%ecx\n\t"
> > > "rdmsr\n\t"
> > > + "cli\n\t"
> > > : : : "eax", "ebx", "ecx", "edx");
> > >
> > > /* DR6.BD test */
> > > @@ -72,11 +87,13 @@ int main(void)
> > > uint64_t cmd;
> > > int i;
> > > /* Instruction lengths starting at ss_start */
> > > - int ss_size[4] = {
> > > + int ss_size[6] = {
> > > + 1, /* sti*/
> > > 2, /* xor */
> > > 2, /* cpuid */
> > > 5, /* mov */
> > > 2, /* rdmsr */
> > > + 1, /* cli */
> > > };
> > >
> > > if (!kvm_check_cap(KVM_CAP_SET_GUEST_DEBUG)) {
> > > @@ -154,7 +171,8 @@ int main(void)
> > > for (i = 0; i < (sizeof(ss_size) / sizeof(ss_size[0])); i++) {
> > > target_rip += ss_size[i];
> > > CLEAR_DEBUG();
> > > - debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_SINGLESTEP;
> > > + debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_SINGLESTEP |
> > > + KVM_GUESTDBG_BLOCKIRQ;
> > > debug.arch.debugreg[7] = 0x00000400;
> > > APPLY_DEBUG();
> > > vcpu_run(vm, VCPU_ID);
> > >
Powered by blists - more mailing lists