linux-kernel - Re: [RESEND PATCH V3 0/2] riscv: add RISC-V Svpbmt Standard Extension supports

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Date:   Tue, 2 Nov 2021 06:58:57 +0100
From:   Christoph Hellwig <hch@....de>
To:     Guo Ren <guoren@...nel.org>
Cc:     Palmer Dabbelt <palmerdabbelt@...gle.com>,
        Wei Fu <wefu@...hat.com>, Anup Patel <Anup.Patel@....com>,
        Atish Patra <Atish.Patra@....com>,
        Christoph Müllner 
        <christoph.muellner@...ll.eu>,
        Philipp Tomsich <philipp.tomsich@...ll.eu>,
        Christoph Hellwig <hch@....de>,
        liush <liush@...winnertech.com>,
        Wei Wu (吴伟) <lazyparser@...il.com>,
        Drew Fustini <drew@...gleboard.org>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        taiten.peng@...onical.com,
        Aniket Ponkshe <aniket.ponkshe@...onical.com>,
        Heinrich Schuchardt <heinrich.schuchardt@...onical.com>,
        Gordan Markus <gordan.markus@...onical.com>,
        Guo Ren <guoren@...ux.alibaba.com>,
        Arnd Bergmann <arnd@...db.de>, Chen-Yu Tsai <wens@...e.org>,
        Maxime Ripard <maxime@...no.tech>,
        Daniel Lustig <dlustig@...dia.com>,
        Greg Favor <gfavor@...tanamicro.com>,
        Andrea Mondelli <andrea.mondelli@...wei.com>,
        Jonathan Behrens <behrensj@....edu>,
        "Xinhaoqu (Freddie)" <xinhaoqu@...wei.com>,
        Bill Huffman <huffman@...ence.com>,
        Nick Kossifidis <mick@....forth.gr>,
        Allen Baum <allen.baum@...erantotech.com>,
        Josh Scheid <jscheid@...tanamicro.com>,
        Richard Trauben <rtrauben@...il.com>
Subject: Re: [RESEND PATCH V3 0/2] riscv: add RISC-V Svpbmt Standard
 Extension supports

On Tue, Nov 02, 2021 at 10:07:58AM +0800, Guo Ren wrote:
> 
> To separate MMU & no-MMU clearly, I suggest fuwei add
> #if defined(CONFIG_64BIT) && defined(CONFIG_MMU)

Actually - for documentation purposes a new CONFIG_RISCV_SVPBMT that
depends on 64BIT && MMU would probably much better as it clearly
documents the intent here.