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Message-ID: <01c32c7f-9639-b3c8-045b-35469a3e54aa@linaro.org>
Date: Wed, 3 Nov 2021 11:22:15 +0000
From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To: Srinivasa Rao Mandadapu <srivasam@...eaurora.org>,
agross@...nel.org, bjorn.andersson@...aro.org, lgirdwood@...il.com,
broonie@...nel.org, robh+dt@...nel.org, plai@...eaurora.org,
bgoswami@...eaurora.org, perex@...ex.cz, tiwai@...e.com,
rohitkr@...eaurora.org, linux-arm-msm@...r.kernel.org,
alsa-devel@...a-project.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, swboyd@...omium.org,
judyhsiao@...omium.org
Cc: Venkata Prasad Potturu <potturu@...eaurora.org>
Subject: Re: [PATCH v2 1/3] pinctrl: qcom: Update lpass variant independent
functions as generic
Hi Srinivasa,
Thanks for the patches, I think you forgot to add correct mailing list
for this drivers.
Please consider using scripts/get_maintainer.pl to help you with this list.
On 27/10/2021 14:41, Srinivasa Rao Mandadapu wrote:
> Update pin control variable names to make common for all lpass varients.
> Update bulk clock voting to optional voting as ADSP bypass platform doesn't
> need macro and decodec clocks, these are maintained as power domains and
> operated from lpass audio core cc.
How are you going to ensure that the powerdomains are switched on when
setting up the pinctrl configuration.
Should we not take a reference to the power-domain in this driver?
--srini
>
> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@...eaurora.org>
> Co-developed-by: Venkata Prasad Potturu <potturu@...eaurora.org>
> Signed-off-by: Venkata Prasad Potturu <potturu@...eaurora.org>
> ---
> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> index 2f19ab4..0bd0c16 100644
> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> @@ -107,7 +107,7 @@ struct lpi_pinctrl {
> };
>
> /* sm8250 variant specific data */
> -static const struct pinctrl_pin_desc sm8250_lpi_pins[] = {
> +static const struct pinctrl_pin_desc lpass_lpi_pins[] = {
> PINCTRL_PIN(0, "gpio0"),
> PINCTRL_PIN(1, "gpio1"),
> PINCTRL_PIN(2, "gpio2"),
> @@ -124,7 +124,7 @@ static const struct pinctrl_pin_desc sm8250_lpi_pins[] = {
> PINCTRL_PIN(13, "gpio13"),
> };
>
> -enum sm8250_lpi_functions {
> +enum lpass_lpi_functions {
> LPI_MUX_dmic1_clk,
> LPI_MUX_dmic1_data,
> LPI_MUX_dmic2_clk,
> @@ -203,7 +203,7 @@ static const struct lpi_pingroup sm8250_groups[] = {
> LPI_PINGROUP(13, NO_SLEW, dmic3_data, i2s2_data, _, _),
> };
>
> -static const struct lpi_function sm8250_functions[] = {
> +static const struct lpi_function lpass_functions[] = {
> LPI_FUNCTION(dmic1_clk),
> LPI_FUNCTION(dmic1_data),
> LPI_FUNCTION(dmic2_clk),
> @@ -228,12 +228,12 @@ static const struct lpi_function sm8250_functions[] = {
> };
>
> static struct lpi_pinctrl_variant_data sm8250_lpi_data = {
> - .pins = sm8250_lpi_pins,
> - .npins = ARRAY_SIZE(sm8250_lpi_pins),
> + .pins = lpass_lpi_pins,
> + .npins = ARRAY_SIZE(lpass_lpi_pins),
> .groups = sm8250_groups,
> .ngroups = ARRAY_SIZE(sm8250_groups),
> - .functions = sm8250_functions,
> - .nfunctions = ARRAY_SIZE(sm8250_functions),
> + .functions = lpass_functions,
> + .nfunctions = ARRAY_SIZE(lpass_functions),
> };
>
> static int lpi_gpio_read(struct lpi_pinctrl *state, unsigned int pin,
> @@ -615,7 +615,7 @@ static int lpi_pinctrl_probe(struct platform_device *pdev)
> return dev_err_probe(dev, PTR_ERR(pctrl->slew_base),
> "Slew resource not provided\n");
>
> - ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
> + ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
> if (ret)
> return dev_err_probe(dev, ret, "Can't get clocks\n");
>
>
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