linux-kernel - [PATCH v3 4/6] x86/mce/inject: Simplify evaluation of writes ignored in status registers

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20211104215846.254012-5-Smita.KoralahalliChannabasappa@amd.com>
Date:   Thu, 4 Nov 2021 16:58:44 -0500
From:   Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
To:     <x86@...nel.org>, <linux-edac@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
CC:     Tony Luck <tony.luck@...el.com>, "H . Peter Anvin" <hpa@...or.com>,
        <yazen.ghannam@....com>, <Smita.KoralahalliChannabasappa@....com>
Subject: [PATCH v3 4/6] x86/mce/inject: Simplify evaluation of writes ignored in status registers

Clean up code in prepare_msrs() and avoid reading the status variable
and checking for writes ignored each time for SMCA, legacy and deferred
case.

Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
---
 arch/x86/kernel/cpu/mce/inject.c | 31 ++++++++++++-------------------
 1 file changed, 12 insertions(+), 19 deletions(-)

diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inject.c
index 4d5689342384..8772d8820994 100644
--- a/arch/x86/kernel/cpu/mce/inject.c
+++ b/arch/x86/kernel/cpu/mce/inject.c
@@ -483,41 +483,34 @@ static void prepare_msrs(void *info)
 	struct mce m = *i_mce_err->mce;
 	u8 b = m.bank;
 
+	u32 status_reg = MSR_IA32_MCx_STATUS(b);
+
 	wrmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
 
 	if (boot_cpu_has(X86_FEATURE_SMCA)) {
 		if (m.inject_flags == DFR_INT_INJ) {
-			wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(b), m.status);
-			rdmsrl(MSR_AMD64_SMCA_MCx_DESTAT(b), m.status);
-			if (!m.status)
-				goto out;
-
+			status_reg = MSR_AMD64_SMCA_MCx_DESTAT(b);
 			wrmsrl(MSR_AMD64_SMCA_MCx_DEADDR(b), m.addr);
 		} else {
-			wrmsrl(MSR_AMD64_SMCA_MCx_STATUS(b), m.status);
-			rdmsrl(MSR_AMD64_SMCA_MCx_STATUS(b), m.status);
-			if (!m.status)
-				goto out;
-
+			status_reg = MSR_AMD64_SMCA_MCx_STATUS(b);
 			wrmsrl(MSR_AMD64_SMCA_MCx_ADDR(b), m.addr);
 		}
 
 		wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), m.misc);
 		wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), m.synd);
 	} else {
-		wrmsrl(MSR_IA32_MCx_STATUS(b), m.status);
-		rdmsrl(MSR_IA32_MCx_STATUS(b), m.status);
-		if (!m.status)
-			goto out;
-
 		wrmsrl(MSR_IA32_MCx_ADDR(b), m.addr);
 		wrmsrl(MSR_IA32_MCx_MISC(b), m.misc);
 	}
 
-out:
-	pr_err("Error injection is not available\n");
-	i_mce_err->err = -EINVAL;
-	return;
+	wrmsrl(status_reg, m.status);
+	rdmsrl(status_reg, m.status);
+
+	if (!m.status) {
+		pr_err("Error injection is not available\n");
+		i_mce_err->err = -EINVAL;
+		return;
+	}
 }
 
 static void do_inject(void)
-- 
2.17.1