linux-kernel - Re: [PATCH v2 1/2] clocksource/drivers/exynos_mct_v2: introduce Exynos MCT version 2 driver for next Exynos SoC

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Message-ID: <20211104094453.GA58798@C02TD0UTHF1T.local>
Date:   Thu, 4 Nov 2021 09:44:53 +0000
From:   Mark Rutland <mark.rutland@....com>
To:     Youngmin Nam <youngmin.nam@...sung.com>
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
        will@...nel.org, daniel.lezcano@...aro.org, tglx@...utronix.de,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, pullip.cho@...sung.com,
        hoony.yu@...sung.com, hajun.sung@...sung.com,
        myung-su.cha@...sung.com, kgene@...nel.org
Subject: Re: [PATCH v2 1/2] clocksource/drivers/exynos_mct_v2: introduce
 Exynos MCT version 2 driver for next Exynos SoC

Hi,

On Thu, Nov 04, 2021 at 09:21:02AM +0900, Youngmin Nam wrote:
> On Wed, Nov 03, 2021 at 10:04:18AM +0000, Mark Rutland wrote:
> > On Wed, Nov 03, 2021 at 06:57:28PM +0900, Youngmin Nam wrote:
> > > On Wed, Nov 03, 2021 at 10:04:36AM +0100, Krzysztof Kozlowski wrote:
> > > > On 03/11/2021 10:24, Youngmin Nam wrote:
> > > > > On Wed, Nov 03, 2021 at 09:18:07AM +0100, Krzysztof Kozlowski wrote:
> > > > >> On 03/11/2021 01:09, Youngmin Nam wrote:
> > > > >>> On Tue, Nov 02, 2021 at 10:28:10AM +0000, Mark Rutland wrote:

> > > > >>>> Previously Will asked you to try CLOCK_EVT_FEAT_PERCPU here, and to set
> > > > >>>> the C3STOP flag on the arch timer via the DT when necessary, rather than
> > > > >>>> trying to override the arch timer like this:

> > > > >>> Yes, I believe Will's suggestion definitely will work.

> > > So, how about we control timer rating value with DT ?
> > > Of course the default rating value should be lower than arm arch timer's.
> > > Do you agree with this?
> > 
> > No; placing a rating value in the DT is a hack. That should *not* live
> > in the DT because it's linux-internal detail and not a description of
> > the HW.
> 
> So, how do we use MCTv2 only for clock event device if there are some
> limitations caused by SoC design implemention ?

What limitations? Are you thinking of a known issue, or just in case
there is a bug in future HW?

If there is a problem, we'll need to describe that in the DT somehow,
and we need to know speciifcally what that limitation is.

Above you said that Will's suggestion will definitely work, which
implies no such limitations.

Thanks,
Mark.