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Message-ID: <CAOMZO5AZLT7SmpH007S5oZg7k+qJdmHTxb+CpvyXXZJtXQf4ww@mail.gmail.com>
Date:   Sun, 7 Nov 2021 09:58:15 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     Adam Ford <aford173@...il.com>
Cc:     "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        Tim Harvey <tharvey@...eworks.com>,
        Schrempf Frieder <frieder.schrempf@...tron.de>,
        linux-media <linux-media@...r.kernel.org>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Adam Ford-BE <aford@...conembedded.com>,
        cstevens@...conembedded.com,
        Jagan Teki <jagan@...rulasolutions.com>,
        Rob Herring <robh+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        NXP Linux Team <linux-imx@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>, Peng Fan <peng.fan@....com>,
        Lucas Stach <l.stach@...gutronix.de>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2 1/5] soc: imx: imx8m-blk-ctrl: Fix imx8mm mipi reset

Hi Adam,

On Sat, Nov 6, 2021 at 12:54 PM Adam Ford <aford173@...il.com> wrote:
>
> Most of the blk-ctrl reset bits are found in one register, however
> there are two bits in offset 8 for pulling the MIPI DPHY out of reset
> and these need to be set when IMX8MM_DISPBLK_PD_MIPI_CSI is brought
> out of reset or the MIPI_CSI hangs.
>
> Fixes: 926e57c065df ("soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl")
> Signed-off-by: Adam Ford <aford173@...il.com>

Reviewed-by: Fabio Estevam <festevam@...il.com>

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