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Message-ID: <202111072340.3Qi6jmsm-lkp@intel.com>
Date:   Sun, 7 Nov 2021 23:23:45 +0800
From:   kernel test robot <lkp@...el.com>
To:     "Liu, Zhan" <Zhan.Liu@....com>
Cc:     kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
        Alex Deucher <alexander.deucher@....com>,
        Charlene Liu <charlene.liu@....com>
Subject: drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dpcs/dpcs_4_2_0_offset.h:11936:111:
 error: initialized field overwritten

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   b5013d084e03e82ceeab4db8ae8ceeaebe76b0eb
commit: 45d65c0f09aaa6cdd21fe0743f317d4bbdfd1466 drm/amd/display: Fix B0 USB-C DP Alt mode
date:   5 weeks ago
config: x86_64-buildonly-randconfig-r003-20211106 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=45d65c0f09aaa6cdd21fe0743f317d4bbdfd1466
        git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
        git fetch --no-tags linus master
        git checkout 45d65c0f09aaa6cdd21fe0743f317d4bbdfd1466
        # save the attached .config to linux build tree
        make W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>

All errors (new ones prefixed by >>):

     273 |  .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:67:2: note: in expansion of macro 'SRI'
      67 |  SRI(TMDS_CTL_BITS, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:512:2: note: in expansion of macro 'DPCS_DCN31_REG_LIST'
     512 |  DPCS_DCN31_REG_LIST(id), \
         |  ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:527:2: note: in expansion of macro 'link_regs'
     527 |  link_regs(3, D),
         |  ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: (near initialization for 'link_enc_regs[3].TMDS_CTL_BITS')
     388 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:264:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     264 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:266:19: note: in expansion of macro 'BASE_INNER'
     266 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:273:14: note: in expansion of macro 'BASE'
     273 |  .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:67:2: note: in expansion of macro 'SRI'
      67 |  SRI(TMDS_CTL_BITS, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:512:2: note: in expansion of macro 'DPCS_DCN31_REG_LIST'
     512 |  DPCS_DCN31_REG_LIST(id), \
         |  ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:527:2: note: in expansion of macro 'link_regs'
     527 |  link_regs(3, D),
         |  ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: error: initialized field overwritten [-Werror=override-init]
     388 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:264:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     264 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:266:19: note: in expansion of macro 'BASE_INNER'
     266 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:273:14: note: in expansion of macro 'BASE'
     273 |  .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:67:2: note: in expansion of macro 'SRI'
      67 |  SRI(TMDS_CTL_BITS, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:512:2: note: in expansion of macro 'DPCS_DCN31_REG_LIST'
     512 |  DPCS_DCN31_REG_LIST(id), \
         |  ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:528:2: note: in expansion of macro 'link_regs'
     528 |  link_regs(4, E)
         |  ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: (near initialization for 'link_enc_regs[4].TMDS_CTL_BITS')
     388 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:264:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     264 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:266:19: note: in expansion of macro 'BASE_INNER'
     266 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:273:14: note: in expansion of macro 'BASE'
     273 |  .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:67:2: note: in expansion of macro 'SRI'
      67 |  SRI(TMDS_CTL_BITS, DIG, id), \
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:512:2: note: in expansion of macro 'DPCS_DCN31_REG_LIST'
     512 |  DPCS_DCN31_REG_LIST(id), \
         |  ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:528:2: note: in expansion of macro 'link_regs'
     528 |  link_regs(4, E)
         |  ^~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:73:
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_1_2_sh_mask.h:34334:111: error: initialized field overwritten [-Werror=override-init]
   34334 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT                                                                  0x0
         |                                                                                                               ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:173:16: note: in expansion of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
     173 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:47:2: note: in expansion of macro 'LE_SF'
      47 |  LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:532:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN31'
     532 |  LINK_ENCODER_MASK_SH_LIST_DCN31(__SHIFT), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_1_2_sh_mask.h:34334:111: note: (near initialization for 'le_shift.TMDS_CTL0')
   34334 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT                                                                  0x0
         |                                                                                                               ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:173:16: note: in expansion of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
     173 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:47:2: note: in expansion of macro 'LE_SF'
      47 |  LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:532:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN31'
     532 |  LINK_ENCODER_MASK_SH_LIST_DCN31(__SHIFT), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:75:
>> drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dpcs/dpcs_4_2_0_offset.h:11936:111: error: initialized field overwritten [-Werror=override-init]
   11936 | #define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4__SHIFT                                            0x10
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dpcs/dpcs_4_2_0_offset.h:11936:111: note: in definition of macro 'RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4__SHIFT'
   11936 | #define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4__SHIFT                                            0x10
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:119:2: note: in expansion of macro 'LE_SF'
     119 |  LE_SF(RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DP4, mask_sh),\
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:533:2: note: in expansion of macro 'DPCS_DCN31_MASK_SH_LIST'
     533 |  DPCS_DCN31_MASK_SH_LIST(__SHIFT)
         |  ^~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dpcs/dpcs_4_2_0_offset.h:11936:111: note: (near initialization for 'le_shift.RDPCS_PHY_DPALT_DP4')
   11936 | #define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4__SHIFT                                            0x10
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dpcs/dpcs_4_2_0_offset.h:11936:111: note: in definition of macro 'RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4__SHIFT'
   11936 | #define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4__SHIFT                                            0x10
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:119:2: note: in expansion of macro 'LE_SF'
     119 |  LE_SF(RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DP4, mask_sh),\
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:533:2: note: in expansion of macro 'DPCS_DCN31_MASK_SH_LIST'
     533 |  DPCS_DCN31_MASK_SH_LIST(__SHIFT)
         |  ^~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:73:
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_1_2_sh_mask.h:34338:111: error: initialized field overwritten [-Werror=override-init]
   34338 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK                                                                    0x00000001L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:173:16: note: in expansion of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK'
     173 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:47:2: note: in expansion of macro 'LE_SF'
      47 |  LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:537:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN31'
     537 |  LINK_ENCODER_MASK_SH_LIST_DCN31(_MASK), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_1_2_sh_mask.h:34338:111: note: (near initialization for 'le_mask.TMDS_CTL0')
   34338 | #define DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK                                                                    0x00000001L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:173:16: note: in expansion of macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0_MASK'
     173 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:47:2: note: in expansion of macro 'LE_SF'
      47 |  LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:537:2: note: in expansion of macro 'LINK_ENCODER_MASK_SH_LIST_DCN31'
     537 |  LINK_ENCODER_MASK_SH_LIST_DCN31(_MASK), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:75:
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dpcs/dpcs_4_2_0_offset.h:11939:111: error: initialized field overwritten [-Werror=override-init]
   11939 | #define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4_MASK                                              0x00010000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dpcs/dpcs_4_2_0_offset.h:11939:111: note: in definition of macro 'RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4_MASK'
   11939 | #define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4_MASK                                              0x00010000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:119:2: note: in expansion of macro 'LE_SF'
     119 |  LE_SF(RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DP4, mask_sh),\
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:538:2: note: in expansion of macro 'DPCS_DCN31_MASK_SH_LIST'
     538 |  DPCS_DCN31_MASK_SH_LIST(_MASK)
         |  ^~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dpcs/dpcs_4_2_0_offset.h:11939:111: note: (near initialization for 'le_mask.RDPCS_PHY_DPALT_DP4')
   11939 | #define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4_MASK                                              0x00010000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dpcs/dpcs_4_2_0_offset.h:11939:111: note: in definition of macro 'RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4_MASK'
   11939 | #define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4_MASK                                              0x00010000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_dio_link_encoder.h:119:2: note: in expansion of macro 'LE_SF'
     119 |  LE_SF(RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6, RDPCS_PHY_DPALT_DP4, mask_sh),\
         |  ^~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:538:2: note: in expansion of macro 'DPCS_DCN31_MASK_SH_LIST'
     538 |  DPCS_DCN31_MASK_SH_LIST(_MASK)
         |  ^~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:71:
   drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: error: initialized field overwritten [-Werror=override-init]
     388 | #define DCN_BASE__INST0_SEG2                       0x000034C0
         |                                                    ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:264:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
     264 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
         |                         ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:266:19: note: in expansion of macro 'BASE_INNER'
     266 | #define BASE(seg) BASE_INNER(seg)
         |                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:273:14: note: in expansion of macro 'BASE'
     273 |  .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |              ^~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:42:2: note: in expansion of macro 'SRI'
      42 |  SRI(CM_GAMCOR_LUT_INDEX, CM, id),\
         |  ^~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.h:161:2: note: in expansion of macro 'DPP_REG_LIST_DCN30_COMMON'
     161 |  DPP_REG_LIST_DCN30_COMMON(id), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:543:2: note: in expansion of macro 'DPP_REG_LIST_DCN30'
     543 |  DPP_REG_LIST_DCN30(id),\
         |  ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:547:2: note: in expansion of macro 'dpp_regs'
     547 |  dpp_regs(0),
         |  ^~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: (near initialization for 'dpp_regs[0].CM_GAMCOR_LUT_INDEX')
     388 | #define DCN_BASE__INST0_SEG2                       0x000034C0


vim +11936 drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dpcs/dpcs_4_2_0_offset.h

 11934	
 11935	//RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6
 11936	#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4__SHIFT                                            0x10
 11937	#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE__SHIFT                                        0x11
 11938	#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE_ACK__SHIFT                                    0x12
 11939	#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DP4_MASK                                              0x00010000L
 11940	#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE_MASK                                          0x00020000L
 11941	#define RDPCSPIPE0_RDPCSPIPE_PHY_CNTL6__RDPCS_PHY_DPALT_DISABLE_ACK_MASK                                      0x00040000L
 11942	

---
0-DAY CI Kernel Test Service, Intel Corporation
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