linux-kernel - Re: [PATCH v3 14/16] serial: 8250

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Message-ID: <CAMuHMdVz1R_K7Zayj9LJBM1GpMVi2s8k9jFa8DZPhNWM6B2prA@mail.gmail.com>
Date:   Mon, 8 Nov 2021 10:32:23 +0100
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Emil Renner Berthing <kernel@...il.dk>
Cc:     linux-riscv <linux-riscv@...ts.infradead.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        "open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Rob Herring <robh+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Linus Walleij <linus.walleij@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Jiri Slaby <jirislaby@...nel.org>,
        Maximilian Luz <luzmaximilian@...il.com>,
        Sagar Kadam <sagar.kadam@...ive.com>,
        Drew Fustini <drew@...gleboard.org>,
        Michael Zhu <michael.zhu@...rfivetech.com>,
        Fu Wei <tekkamanninja@...il.com>,
        Anup Patel <anup.patel@....com>,
        Atish Patra <atish.patra@....com>,
        Matteo Croce <mcroce@...rosoft.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 14/16] serial: 8250_dw: Add StarFive JH7100 quirk

Hi Esmil,

On Tue, Nov 2, 2021 at 5:12 PM Emil Renner Berthing <kernel@...il.dk> wrote:
> On the StarFive JH7100 RISC-V SoC the UART core clocks can't be set to
> exactly 16 * 115200Hz and many other common bitrates. Trying this will
> only result in a higher input clock, but low enough that the UART's
> internal divisor can't come close enough to the baud rate target.
> So rather than try to set the input clock it's better to skip the
> clk_set_rate call and rely solely on the UART's internal divisor.
>
> Signed-off-by: Emil Renner Berthing <kernel@...il.dk>

Thanks for your patch!

Reviewed-by: Geert Uytterhoeven <geert@...ux-m68k.org>

> --- a/drivers/tty/serial/8250/8250_dw.c
> +++ b/drivers/tty/serial/8250/8250_dw.c
> @@ -414,6 +414,8 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)
>
>                 if (of_device_is_compatible(np, "marvell,armada-38x-uart"))
>                         p->serial_out = dw8250_serial_out38x;
> +               if (of_device_is_compatible(np, "starfive,jh7100-uart"))
> +                       p->set_termios = dw8250_do_set_termios;

BTW, it would be great for a follow-up patch to get rid of
all these of_device_is_compatible() checks, and start using
dw8250_of_match[...].data instead.

>
>         } else if (acpi_dev_present("APMC0D08", NULL, -1)) {
>                 p->iotype = UPIO_MEM32;
> @@ -696,6 +698,7 @@ static const struct of_device_id dw8250_of_match[] = {
>         { .compatible = "cavium,octeon-3860-uart" },
>         { .compatible = "marvell,armada-38x-uart" },
>         { .compatible = "renesas,rzn1-uart" },
> +       { .compatible = "starfive,jh7100-uart" },
>         { /* Sentinel */ }
>  };

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds