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Message-ID: <a2a8cca55604755458a2b5daec59290b239a142a.camel@pengutronix.de>
Date: Mon, 08 Nov 2021 10:35:09 +0100
From: Philipp Zabel <p.zabel@...gutronix.de>
To: Yifeng Zhao <yifeng.zhao@...k-chips.com>, heiko@...ech.de,
robh+dt@...nel.org
Cc: devicetree@...r.kernel.org, vkoul@...nel.org,
michael.riesch@...fvision.net, linux-rockchip@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org, kishon@...com, cl@...k-chips.com
Subject: Re: [PATCH v3 2/3] phy/rockchip: add naneng combo phy for RK3568
On Mon, 2021-10-25 at 16:06 +0800, Yifeng Zhao wrote:
> This patch implements a combo phy driver for Rockchip SoCs
> with NaNeng IP block. This phy can be used as pcie-phy, usb3-phy,
> sata-phy or sgmii-phy.
>
> Signed-off-by: Yifeng Zhao <yifeng.zhao@...k-chips.com>
> ---
>
> Changes in v3:
> - Using api devm_reset_control_get_optional_exclusive and dev_err_probe
Reviewed-by: Philipp Zabel <p.zabel@...gutronix.de>
regards
Philipp
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