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Message-ID: <000401d7d492$e157a450$a406ecf0$@samsung.com>
Date:   Mon, 8 Nov 2021 20:22:14 +0900
From:   "Jaewon Kim" <jaewon02.kim@...sung.com>
To:     "'Krzysztof Kozlowski'" <krzysztof.kozlowski@...onical.com>,
        "'Wolfram Sang'" <wsa@...nel.org>,
        "'Rob Herring'" <robh+dt@...nel.org>
Cc:     "'Chanho Park'" <chanho61.park@...sung.com>,
        <linux-i2c@...r.kernel.org>, <linux-samsung-soc@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 1/2] i2c: exynos5: support USI(Universal Serial
 Interface)

Hello Krzysztof

> On 04/11/2021 09:10, Jaewon Kim wrote:
> >
> >>> +	if (ret) {
> >>> +		dev_err(dev, "usi-sysreg offset is not specified\n");
> >>> +		return ret;
> >>> +	}
> >>> +
> >>> +	regmap_update_bits(i2c->usi_sysreg, i2c->usi_offset,
> >>> +			SYSREG_USI_SW_CONF_MASK, SYSREG_I2C_SW_CONF);
> >>> +
> >>> +	exynos_usi_reset(i2c);
> >>
> >> You are clearing the reset flag, but not setting it back on probe
> >> failure. What happens if the probe fails after this clear()? E.g.
> >> because of deferred probe? The next probe try will start on a not-reset controller. Will it work?
> >>
> >
> > The user manual guides USI_RESET to be done after changing the system register.
> > For clarity, we will change not only to clear reset, but to clear after reset.
> >
> 
> What I meant, is do you handle probe failure correctly (e.g. probe deferral)? It's fine to leave the
> reset cleared after deferred probe?
> 

I understood.
In my opinion, rather than resetting USI_CON_RESET in the probe fail case.
It seems it is more clear to set the reset as shown below.

val = readl(i2c->regs + USI_CON);
val |= USI_CON_RESET;
writel(val, i2c->regs + USI_CON);
udelay(1);

val = readl(i2c->regs + USI_CON);
val &= ~USI_CON_RESET;
writel(val, i2c->regs + USI_CON);


> Best regards,
> Krzysztof

Thanks
Jaewon Kim

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