[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <BLAPR08MB6900B02028177141C1FA4820B8919@BLAPR08MB6900.namprd08.prod.outlook.com>
Date: Mon, 8 Nov 2021 15:06:09 +0000
From: "Shivamurthy Shastri (sshivamurthy)" <sshivamurthy@...ron.com>
To: Richard Weinberger <richard@....at>
CC: Tudor Ambarus <tudor.ambarus@...rochip.com>,
Michael Walle <michael@...le.cc>,
Pratyush Yadav <p.yadav@...com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Vignesh Raghavendra <vigneshr@...com>,
linux-mtd <linux-mtd@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
shiva linuxworks <shiva.linuxworks@...il.com>
Subject: RE: [EXT] Re: [PATCH 0/4] enabling Advanced protection and security
features
Micron Confidential
Hi Richard,
Sorry for late reply.
> > Standard protection features in SPI NOR flashes are legacy and offer a
> > simple way to protect the memory array against accidental or unwanted
> > modification of its content.
> >
> > These patches enable the support for advanced sector protection which
> > protects memory from accidentally corrupting code and data stored, and
> > it also prevents malicious attacks that could intentionally modify the
> > code or data stored in the memory.
> >
> > Micron Flashes offer some of the advanced protection methods using
> > volatile lock bits, non-volatile lock bits, global freeze bits, and
> > password.
>
> Can you please point us to the technical documentation of these features?
> I'm especially interested in the password feature.
Document link:
https://media-www.micron.com/-/media/client/global/documents/products/technical-note/nor-flash/tn2541_mt25q_protection_and_security.pdf?rev=132de35e149b42a4beaac789eacc01d7
Thanks,
Shiva
Micron Confidential
Powered by blists - more mailing lists