lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YYqMcrEhVWxe5By/@sirena.org.uk>
Date:   Tue, 9 Nov 2021 14:57:54 +0000
From:   Mark Brown <broonie@...nel.org>
To:     "LH.Kuo" <lhjeff911@...il.com>
Cc:     p.zabel@...gutronix.de, robh+dt@...nel.org,
        linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, dvorkin@...bo.com,
        qinjian@...lus1.com, wells.lu@...plus.com,
        "LH.Kuo" <lh.kuo@...plus.com>
Subject: Re: [PATCH v2 2/2] devicetree bindings SPI Add bindings doc for
 Sunplus SP7021

On Tue, Nov 09, 2021 at 05:01:28PM +0800, LH.Kuo wrote:
> Add devicetree bindings SPI Add bindings doc for Sunplus SP7021

Please submit patches using subject lines reflecting the style for the
subsystem, this makes it easier for people to identify relevant patches.
Look at what existing commits in the area you're changing are doing and
make sure your subject lines visually resemble what they're doing.
There's no need to resubmit to fix this alone.

> +  reg:
> +    items:
> +      - description: Base address and length of the SPI master registers
> +      - description: Base address and length of the SPI slave registers
> +
> +  reg-names:
> +    items:
> +      - const: spi_master
> +      - const: spi_slave

What exactly is the physical overlap between the two controllers - is it
just the pinmux?

Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ