linux-kernel - Re: [Letux-kernel] [PATCH v5 5/7] MIPS: DTS: jz4780: Account for Synopsys HDMI driver and LCD controllers

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Date:   Tue, 9 Nov 2021 22:14:22 +0100
From:   "H. Nikolaus Schaller" <hns@...delico.com>
To:     Paul Cercueil <paul@...pouillou.net>
Cc:     Mark Rutland <mark.rutland@....com>,
        Paul Boddie <paul@...die.org.uk>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Neil Armstrong <narmstrong@...libre.com>,
        David Airlie <airlied@...ux.ie>,
        dri-devel <dri-devel@...ts.freedesktop.org>,
        linux-mips <linux-mips@...r.kernel.org>,
        Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Sam Ravnborg <sam@...nborg.org>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        Harry Wentland <harry.wentland@....com>,
        OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS 
        <devicetree@...r.kernel.org>, Kees Cook <keescook@...omium.org>,
        Jon as Karlman <jonas@...boo.se>,
        Mark Brown <broonie@...nel.org>,
        Maxime Ripard <maxime@...no.tech>,
        Ezequiel Garcia <ezequiel@...labora.com>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Liam Girdwood <lgirdwood@...il.com>,
        Robert Foss <robert.foss@...aro.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Rob Herring <robh+dt@...nel.org>,
        "Eric W. Biederman" <ebiederm@...ssion.com>,
        Daniel Vetter <daniel@...ll.ch>,
        Hans Verkuil <hverkuil-cisco@...all.nl>,
        Discussions about the Letux Kernel 
        <letux-kernel@...nphoenux.org>
Subject: Re: [Letux-kernel] [PATCH v5 5/7] MIPS: DTS: jz4780: Account for
 Synopsys HDMI driver and LCD controllers



> Am 09.11.2021 um 21:42 schrieb H. Nikolaus Schaller <hns@...delico.com>:
> 
>> So you want to update these properties to add the HDMI clock setting, like this:
>> 
>> 	assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>, <&cgu JZ4780_CLK_HDMI>;
>> 	assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>;
>> 	assigned-clock-rates = <48000000>, <0>, <27000000>;
> 
> Will give it a try.

Yes, works. So v6 is not far away.

BR,
Nikolaus