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Date: Wed, 10 Nov 2021 16:21:51 -0600
From: Li Yang <leoyang.li@....com>
To: Shawn Guo <shawnguo@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, Li Yang <leoyang.li@....com>
Subject: [PATCH 02/11] dt-bindings: fsl,layerscape-dcfg: add missing compatible for lx2160a
The compatbile string is already in use, fix the chip list in binding to
include it.
Signed-off-by: Li Yang <leoyang.li@....com>
---
.../devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
index b5cb374dc47d..10a91cc8b997 100644
--- a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
@@ -8,7 +8,7 @@ Required properties:
- compatible: Should contain a chip-specific compatible string,
Chip-specific strings are of the form "fsl,<chip>-dcfg",
The following <chip>s are known to be supported:
- ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
+ ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a
- reg : should contain base address and length of DCFG memory-mapped registers
--
2.25.1
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