linux-kernel - Re: [PATCH 12/13] riscv: icicle-kit: update microchip icicle kit device tree

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 10 Nov 2021 15:07:11 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <geert@...ux-m68k.org>
CC:     <linus.walleij@...aro.org>, <bgolaszewski@...libre.com>,
        <robh+dt@...nel.org>, <jassisinghbrar@...il.com>,
        <paul.walmsley@...ive.com>, <palmer@...belt.com>,
        <aou@...s.berkeley.edu>, <a.zummo@...ertech.it>,
        <alexandre.belloni@...tlin.com>, <broonie@...nel.org>,
        <gregkh@...uxfoundation.org>, <Lewis.Hanly@...rochip.com>,
        <Daire.McNamara@...rochip.com>, <atish.patra@....com>,
        <Ivan.Griffin@...rochip.com>, <linux-gpio@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-i2c@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <linux-crypto@...r.kernel.org>, <linux-rtc@...r.kernel.org>,
        <linux-spi@...r.kernel.org>, <linux-usb@...r.kernel.org>,
        <krzysztof.kozlowski@...onical.com>, <bin.meng@...driver.com>
Subject: Re: [PATCH 12/13] riscv: icicle-kit: update microchip icicle kit
 device tree

On 10/11/2021 14:58, Geert Uytterhoeven wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi Conor,
> 
>>>>                   plic: interrupt-controller@...0000 {
>>>> -                       #interrupt-cells = <1>;
>>>> -                       compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
>>>> +                       compatible = "sifive,plic-1.0.0";
>>>
>>> Why drop the first one again?
>> we felt it didnt make sense to have something that specifically
>> references the fu540 in the device tree for this board.
> 
> That would be a revert of commit 73d3c44115514616 ("riscv: dts:
> microchip: add missing compatibles for clint and plic"), which you
> supplied an R-b tag for?
> 
> Is this the same plic as in the FU540 SoC? Or do we need a new
> microchip,mpfs-plic compatible value?
> 
yeah, ignore that. i confused this change (which is an accidental 
clobber) with another sifive compatible that was dropped for not being 
relevant. hardly makes sense to drop this one when i kept it for the 
clint and cache controller!

> 
> Gr{oetje,eeting}s,
> 
>                          Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                  -- Linus Torvalds
>