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Date: Thu, 11 Nov 2021 12:53:42 +0800 From: James Lo <james.lo@...iatek.com> To: Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com> CC: Hsin-Hsiung Wang <hsin-hsiung.wang@...iatek.com>, James Lo <james.lo@...iatek.com>, <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>, <linux-mediatek@...ts.infradead.org>, <srv_heupstream@...iatek.com>, <Project_Global_Chrome_Upstream_Group@...iatek.com> Subject: [PATCH v14 1/3] dt-bindings: spmi: modify the constraint of reg property The constraint of reg may larger than 1, so we modify to 'minItem: 1' and 'maxItem: 2'. And adds documentation for the SPMI controller found on Mediatek SoCs. Merge [RESEND,v13,2/4] into [RESEND,v13,1/4] for fix yaml error. [RESEND,v13,1/4] : dt-bindings: spmi: modify the constraint of reg property [RESEND,v13,2/4] : dt-bindings: spmi: document binding for the Mediatek SPMI controller Signed-off-by: James Lo <james.lo@...iatek.com> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@...iatek.com> Acked-by: Rob Herring <robh@...nel.org> --- .../bindings/spmi/mtk,spmi-mtk-pmif.yaml | 76 +++++++++++++++++++ .../devicetree/bindings/spmi/spmi.yaml | 3 +- 2 files changed, 78 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml new file mode 100644 index 000000000000..2445c5e0b0ef --- /dev/null +++ b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek SPMI Controller Device Tree Bindings + +maintainers: + - Hsin-Hsiung Wang <hsin-hsiung.wang@...iatek.com> + +description: |+ + On MediaTek SoCs the PMIC is connected via SPMI and the controller allows + for multiple SoCs to control a single SPMI master. + +allOf: + - $ref: "spmi.yaml" + +properties: + compatible: + enum: + - mediatek,mt6873-spmi + - mediatek,mt8195-spmi + + reg: + maxItems: 2 + + reg-names: + items: + - const: pmif + - const: spmimst + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + items: + - const: pmif_sys_ck + - const: pmif_tmr_ck + - const: spmimst_clk_mux + + assigned-clocks: + maxItems: 1 + + assigned-clock-parents: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8192-clk.h> + + spmi: spmi@...27000 { + compatible = "mediatek,mt6873-spmi"; + reg = <0x10027000 0xe00>, + <0x10029000 0x100>; + reg-names = "pmif", "spmimst"; + clocks = <&infracfg CLK_INFRA_PMIC_AP>, + <&infracfg CLK_INFRA_PMIC_TMR>, + <&topckgen CLK_TOP_SPMI_MST_SEL>; + clock-names = "pmif_sys_ck", + "pmif_tmr_ck", + "spmimst_clk_mux"; + assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>; + }; +... diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml index 1d243faef2f8..f29183a45adc 100644 --- a/Documentation/devicetree/bindings/spmi/spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/spmi.yaml @@ -25,7 +25,8 @@ properties: pattern: "^spmi@.*" reg: - maxItems: 1 + maxItems: 2 + minItems: 1 "#address-cells": const: 2 -- 2.18.0
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