linux-kernel - Re: [RFC PATCH v3 5/7] gpio: gpiolib: Add ngirq member to struct gpio_irq

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 11 Nov 2021 22:52:06 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc:     Marc Zyngier <maz@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        devicetree <devicetree@...r.kernel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Prabhakar <prabhakar.csengg@...il.com>,
        Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [RFC PATCH v3 5/7] gpio: gpiolib: Add ngirq member to struct gpio_irq_chip

On Thu, Nov 11, 2021 at 12:59 AM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
>
> Number of GPIO IRQ's supported by the chip is not always

supported GPIO IRQs by the chip

> equal to the number of GPIO pins. For example on Renesas RZ/G2L
> SoC where it has GPIO0-122 pins but at a give point a maximum
> of only 32 GPIO pins can be used as IRQ lines in the IRQC domain.
>
> This patch adds ngirq member to struct gpio_irq_chip and passes
> this as a size to irq_domain_create_hierarchy()/irq_domain_create_simple()
> if it is being set in the driver otherwise fallbacks to using ngpio.

...

>         gc->irq.domain = irq_domain_create_hierarchy(
>                 gc->irq.parent_domain,
>                 0,
> -               gc->ngpio,
> +               gc->irq.ngirq ? gc->irq.ngirq : gc->ngpio,

You may use ?: instead as it's done somewhere else in this module.

>                 gc->irq.fwnode,
>                 &gc->irq.child_irq_domain_ops,
>                 gc);

...

>                 gc->irq.domain = irq_domain_create_simple(fwnode,
> -                       gc->ngpio,
> +                       gc->irq.ngirq ? gc->irq.ngirq : gc->ngpio,

Ditto.

>                         gc->irq.first,
>                         gc->irq.domain_ops ?: &gpiochip_domain_ops,

(^^^ You see?)

>                         gc);

...

> +       /**
> +        * @ngirq:
> +        *
> +        * The number of GPIO IRQ's handled by this IRQ domain; usually is

handled GPIO IRQs

> +        * equal to ngpio

Missed period.

> +        */

-- 
With Best Regards,
Andy Shevchenko