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Message-ID: <YY7DgSPChPpXzA9j@robh.at.kernel.org>
Date: Fri, 12 Nov 2021 13:41:53 -0600
From: Rob Herring <robh@...nel.org>
To: Emil Renner Berthing <kernel@...il.dk>
Cc: Michael Zhu <michael.zhu@...rfivetech.com>,
linux-kernel@...r.kernel.org, Jiri Slaby <jirislaby@...nel.org>,
linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Rob Herring <robh+dt@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
linux-clk@...r.kernel.org, Sagar Kadam <sagar.kadam@...ive.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-gpio@...r.kernel.org, Fu Wei <tekkamanninja@...il.com>,
Atish Patra <atish.patra@....com>,
Maximilian Luz <luzmaximilian@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Drew Fustini <drew@...gleboard.org>,
Stephen Boyd <sboyd@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
linux-serial@...r.kernel.org, Anup Patel <anup.patel@....com>,
Matteo Croce <mcroce@...rosoft.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Subject: Re: [PATCH v3 11/16] dt-bindings: pinctrl: Add StarFive JH7100
bindings
On Tue, 02 Nov 2021 17:11:20 +0100, Emil Renner Berthing wrote:
> Add bindings for the GPIO/pin controller on the JH7100 RISC-V SoC by
> StarFive Ltd. This is a test chip for their upcoming JH7110 SoC.
>
> Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
> ---
>
> @Linus: I'm really struggling to find a good way to describe how pin
> muxing works on the JH7100. As you can see I've now resorted to
> ascii-art to try to explain it, but please let me know if it's still
> unclear.
>
> .../pinctrl/starfive,jh7100-pinctrl.yaml | 307 ++++++++++++++++++
> 1 file changed, 307 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml
>
Reviewed-by: Rob Herring <robh@...nel.org>
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