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Message-ID: <20211113113846.oqdnov2hvbmlx5hi@pali>
Date: Sat, 13 Nov 2021 12:38:46 +0100
From: Pali Rohár <pali@...nel.org>
To: Jim Quinlan <jim2101024@...il.com>
Cc: linux-pci@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
Nicolas Saenz Julienne <nsaenz@...nel.org>,
Rob Herring <robh@...nel.org>, Mark Brown <broonie@...nel.org>,
bcm-kernel-feedback-list@...adcom.com, james.quinlan@...adcom.com,
Florian Fainelli <f.fainelli@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Saenz Julienne <nsaenzjulienne@...e.de>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@...ts.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v8 3/8] dt-bindings: PCI: Add bindings for Brcmstb EP
voltage regulators
On Wednesday 10 November 2021 17:14:43 Jim Quinlan wrote:
> Similar to the regulator bindings found in "rockchip-pcie-host.txt", this
> allows optional regulators to be attached and controlled by the PCIe RC
> driver. That being said, this driver searches in the DT subnode (the EP
> node, eg pci-ep@0,0) for the regulator property.
>
> The use of a regulator property in the pcie EP subnode such as
> "vpcie12v-supply" depends on a pending pullreq to the pci-bus.yaml
> file at
>
> https://github.com/devicetree-org/dt-schema/pull/63
>
> Signed-off-by: Jim Quinlan <jim2101024@...il.com>
> ---
> .../bindings/pci/brcm,stb-pcie.yaml | 23 +++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> index 508e5dce1282..ef2427320b7d 100644
> --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> @@ -158,5 +158,28 @@ examples:
> <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;
> brcm,enable-ssc;
> brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>;
> +
> + /* PCIe bridge */
> + pci@0,0 {
Hello! I think that above comment should be "PCIe Root Port" (and not
PCIe bridge) as this node really describes Root Port device in PCIe Root
Complex (correct me if I deduced it wrongly). lspci (-vv) show type of
device on the line "Capabilities: [..] Express".
> + #address-cells = <3>;
> + #size-cells = <2>;
> + reg = <0x0 0x0 0x0 0x0 0x0>;
> + compatible = "pciclass,0604";
> + device_type = "pci";
> + vpcie3v3-supply = <&vreg7>;
> + ranges;
> +
> + /* PCIe endpoint */
> + pci-ep@0,0 {
> + assigned-addresses =
> + <0x82010000 0x0 0xf8000000 0x6 0x00000000 0x0 0x2000>;
> + reg = <0x0 0x0 0x0 0x0 0x0>;
> + compatible = "pci14e4,1688";
> + #address-cells = <3>;
> + #size-cells = <2>;
> +
> + ranges;
> + };
> + };
> };
> };
> --
> 2.17.1
>
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