lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <5876573d-66aa-620e-538d-36a287900c7e@xilinx.com>
Date:   Mon, 15 Nov 2021 10:29:48 +0100
From:   Michal Simek <michal.simek@...inx.com>
To:     Anand Ashok Dumbre <anand.ashok.dumbre@...inx.com>,
        <linux-kernel@...r.kernel.org>, <jic23@...nel.org>,
        <lars@...afoo.de>, <linux-iio@...r.kernel.org>, <git@...inx.com>,
        <michal.simek@...inx.com>, <pmeerw@...erw.net>,
        <devicetree@...r.kernel.org>
CC:     Manish Narani <manish.narani@...inx.com>
Subject: Re: [PATCH v8 1/4] arm64: zynqmp: DT: Add Xilinx AMS node



On 11/8/21 22:05, Anand Ashok Dumbre wrote:
> The Xilinx AMS includes an ADC as well as on-chip sensors that can be
> used to sample external and monitor on-die operating conditions, such as
> temperature and supply voltage levels.
> 
> Co-developed-by: Manish Narani <manish.narani@...inx.com>
> Signed-off-by: Manish Narani <manish.narani@...inx.com>
> Signed-off-by: Anand Ashok Dumbre <anand.ashok.dumbre@...inx.com>
> ---
>   arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 26 +++++++++++++++++++++++++-
>   1 file changed, 25 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 28dccb891a53..b12e0cd0adfd 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -1,4 +1,4 @@
> -// SPDX-License-Identifier: GPL-2.0+
> +// SPDX-License-Identifier: GPL-2.0
>   /*
>    * dts file for Xilinx ZynqMP
>    *
> @@ -849,6 +849,30 @@
>   			timeout-sec = <10>;
>   		};
>   
> +		xilinx_ams: ams@...50000 {
> +			compatible = "xlnx,zynqmp-ams";
> +			status = "disabled";
> +			interrupt-parent = <&gic>;
> +			interrupts = <0 56 4>;
> +			reg = <0x0 0xffa50000 0x0 0x800>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			#io-channel-cells = <1>;
> +			ranges = <0 0 0xffa50800 0x800>;
> +
> +			ams_ps: ams-ps@0 {
> +				compatible = "xlnx,zynqmp-ams-ps";
> +				status = "disabled";
> +				reg = <0 0x400>;
> +			};
> +
> +			ams_pl: ams-pl@400 {
> +				compatible = "xlnx,zynqmp-ams-pl";
> +				status = "disabled";
> +				reg = <0x400 0x400>;
> +			};
> +		};
> +
>   		zynqmp_dpdma: dma-controller@...c0000 {
>   			compatible = "xlnx,zynqmp-dpdma";
>   			status = "disabled";
> 

Please drop this patch from this series. When driver is applied this 
patch will go via my xilinx soc tree.

FYI: And dt binding patch should be the first.

Thanks,
Michal

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ