[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <PH0PR11MB51919E776D51FFCCE81586F6F1989@PH0PR11MB5191.namprd11.prod.outlook.com>
Date: Mon, 15 Nov 2021 02:19:48 +0000
From: "Li, Meng" <Meng.Li@...driver.com>
To: "shawnguo@...nel.org" <shawnguo@...nel.org>,
"leoyang.li@....com" <leoyang.li@....com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: RE: [PATCH] arch: arm64: dts: add delay between CS and CLK signal for
flash device
Is there any comments about this patch?
Thanks,
Limeng
> -----Original Message-----
> From: Li, Meng <Meng.Li@...driver.com>
> Sent: Wednesday, November 3, 2021 11:39 AM
> To: shawnguo@...nel.org; leoyang.li@....com; robh+dt@...nel.org
> Cc: linux-kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> devicetree@...r.kernel.org; Li, Meng <Meng.Li@...driver.com>
> Subject: [PATCH] arch: arm64: dts: add delay between CS and CLK signal for
> flash device
>
> Based on commit d59c90a2400f("spi: spi-fsl-dspi: Convert TCFQ users to XSPI
> FIFO mode ") and 6c1c26ecd9a3("spi:
> spi-fsl-dspi: Accelerate transfers using larger word size if possible"), on
> ls1043a-rdb platform, the spi work mode is changed from TCFQ mode to XSPI
> mode. In order to keep the transmission sequence matches with flash device,
> it is need to add delay between CS and CLK signal.
> The strategy of generating delay value refers to QorIQ LS1043A Reference
> Manual.
>
> Signed-off-by: Meng Li <Meng.Li@...driver.com>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> index 3a669238a0b8..3b1a31a063c6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> @@ -98,6 +98,8 @@
> compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */
> reg = <0>;
> spi-max-frequency = <1000000>; /* input clock */
> + fsl,spi-cs-sck-delay = <100>;
> + fsl,spi-sck-cs-delay = <100>;
> };
>
> slic@2 {
> --
> 2.17.1
Powered by blists - more mailing lists