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Message-ID: <YZJatk2Xs6bYdCyB@ninjato>
Date: Mon, 15 Nov 2021 14:03:50 +0100
From: Wolfram Sang <wsa+renesas@...g-engineering.com>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Rob Herring <robh+dt@...nel.org>,
Vignesh Raghavendra <vigneshr@...com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Mark Brown <broonie@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Sergei Shtylyov <sergei.shtylyov@...il.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-mtd@...ts.infradead.org, linux-spi@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v2 7/7] memory: renesas-rpc-if: Add support for RZ/G2L
On Mon, Oct 25, 2021 at 09:56:31PM +0100, Lad Prabhakar wrote:
> SPI Multi I/O Bus Controller on RZ/G2L SoC is almost identical to
> the RPC-IF interface found on R-Car Gen3 SoC's.
>
> This patch adds a new compatible string for the RZ/G2L family so
> that the timing values on RZ/G2L can be adjusted.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
After some internal investigations we found out that we have to live
with these magic numbers. We shouldn't mix documentation there. So, this
patch is fine as is. The minor nit I will fix incrementally because I
will work on this file soon as well.
Reviewed-by: Wolfram Sang <wsa+renesas@...g-engineering.com>
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