[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <473499ed0710598c59a507815ad11aa4@codeaurora.org>
Date: Mon, 15 Nov 2021 08:33:07 -0800
From: khsieh@...eaurora.org
To: Kuogee Hsieh <quic_khsieh@...cinc.com>
Cc: robdclark@...il.com, sean@...rly.run, swboyd@...omium.org,
vkoul@...nel.org, agross@...nel.org, bjorn.andersson@...aro.org,
robh+dt@...nel.org, devicetree@...r.kernel.org,
quic_abhinavk@...cinc.com, aravindh@...eaurora.org,
quic_sbillaka@...cinc.com, quic_mkrishn@...cinc.com,
quic_kalyant@...cinc.coml, freedreno@...ts.freedesktop.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] arm64: dts: qcom: sc7280: Add Display Port node
On 2021-11-02 16:44, Kuogee Hsieh wrote:
> From: Kuogee Hsieh <khsieh@...eaurora.org>
>
> Signed-off-by: Kuogee Hsieh <quic_khsieh@...cinc.com>
> ---
Anyone has comments on this patch?
>
> Changes in v2:
> -- move fixes of dp_phy reg property to other patch
>
> Changes in v3:
> -- delete "qcom,sc7180-dp" from msm_dp node
>
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 89
> +++++++++++++++++++++++++++++++++++-
> 1 file changed, 87 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index fb2f1506..4414abc 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2709,8 +2709,8 @@
> <&gcc GCC_DISP_GPLL0_CLK_SRC>,
> <&dsi_phy 0>,
> <&dsi_phy 1>,
> - <0>,
> - <0>,
> + <&dp_phy 0>,
> + <&dp_phy 1>,
> <&edp_phy 0>,
> <&edp_phy 1>;
> clock-names = "bi_tcxo",
> @@ -2807,6 +2807,13 @@
> remote-endpoint = <&edp_in>;
> };
> };
> +
> + port@2 {
> + reg = <2>;
> + dpu_intf0_out:
> endpoint {
> +
> remote-endpoint = <&dp_in>;
> + };
> + };
> };
>
> mdp_opp_table: opp-table {
> @@ -3018,6 +3025,78 @@
>
> status = "disabled";
> };
> +
> + msm_dp: displayport-controller@...0000 {
> + status = "disabled";
> + compatible = "qcom,sc7280-dp";
> +
> + reg = <0 0x0ae90000 0 0x1400>;
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <12>;
> +
> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
> + clock-names = "core_iface",
> + "core_aux",
> + "ctrl_link",
> + "ctrl_link_iface",
> + "stream_pixel";
> + #clock-cells = <1>;
> + assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
> + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
> + assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
> + phys = <&dp_phy>;
> + phy-names = "dp";
> +
> + operating-points-v2 = <&dp_opp_table>;
> + power-domains = <&rpmhpd SC7280_CX>;
> +
> + #sound-dai-cells = <0>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>;
> + dp_in: endpoint {
> + remote-endpoint = <&dpu_intf0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dp_out: endpoint { };
> + };
> + };
> +
> + dp_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-160000000 {
> + opp-hz = /bits/ 64 <160000000>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-270000000 {
> + opp-hz = /bits/ 64 <270000000>;
> + required-opps = <&rpmhpd_opp_svs>;
> + };
> +
> + opp-540000000 {
> + opp-hz = /bits/ 64 <540000000>;
> + required-opps = <&rpmhpd_opp_svs_l1>;
> + };
> +
> + opp-810000000 {
> + opp-hz = /bits/ 64 <810000000>;
> + required-opps = <&rpmhpd_opp_nom>;
> + };
> + };
> + };
> };
>
> pdc: interrupt-controller@...0000 {
> @@ -3120,6 +3199,12 @@
> bias-pull-up;
> };
>
> + dp_hot_plug_det: dp-hot-plug-det {
> + pins = "gpio47";
> + function = "dp_hot";
> + bias-disable;
> + };
> +
> qspi_clk: qspi-clk {
> pins = "gpio14";
> function = "qspi_clk";
Powered by blists - more mailing lists