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Message-Id: <20211115165359.985188192@linuxfoundation.org>
Date: Mon, 15 Nov 2021 18:03:15 +0100
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Kewei Xu <kewei.xu@...iatek.com>,
Chen-Yu Tsai <wenst@...omium.org>,
Qii Wang <qii.wang@...iatek.com>,
Wolfram Sang <wsa@...nel.org>, Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.10 470/575] i2c: mediatek: fixing the incorrect register offset
From: Kewei Xu <kewei.xu@...iatek.com>
[ Upstream commit b8228aea5a19d5111a7bf44f7de6749d1f5d487a ]
The reason for the modification here is that the previous
offset information is incorrect, OFFSET_DEBUGSTAT = 0xE4 is
the correct value.
Fixes: 25708278f810 ("i2c: mediatek: Add i2c support for MediaTek MT8183")
Signed-off-by: Kewei Xu <kewei.xu@...iatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>
Reviewed-by: Qii Wang <qii.wang@...iatek.com>
Signed-off-by: Wolfram Sang <wsa@...nel.org>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
drivers/i2c/busses/i2c-mt65xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 0af2784cbd0d9..265635db29aa5 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -195,7 +195,7 @@ static const u16 mt_i2c_regs_v2[] = {
[OFFSET_CLOCK_DIV] = 0x48,
[OFFSET_SOFTRESET] = 0x50,
[OFFSET_SCL_MIS_COMP_POINT] = 0x90,
- [OFFSET_DEBUGSTAT] = 0xe0,
+ [OFFSET_DEBUGSTAT] = 0xe4,
[OFFSET_DEBUGCTRL] = 0xe8,
[OFFSET_FIFO_STAT] = 0xf4,
[OFFSET_FIFO_THRESH] = 0xf8,
--
2.33.0
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