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Message-Id: <20211115173234.489160-1-f.fainelli@gmail.com>
Date:   Mon, 15 Nov 2021 09:32:34 -0800
From:   Florian Fainelli <f.fainelli@...il.com>
To:     bcm-kernel-feedback-list@...adcom.com,
        linux-arm-kernel@...ts.infradead.org
Cc:     Jim Quinlan <jim2101024@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Nicolas Saenz Julienne <nsaenz@...nel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" 
        <linux-rpi-kernel@...ts.infradead.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: dts: bcm2711: Fix PCIe interrupts

On Fri, 29 Oct 2021 14:09:26 -0700, Florian Fainelli <f.fainelli@...il.com> wrote:
> The PCIe host bridge has two interrupt lines, one that goes towards it
> PCIE_INTR2 second level interrupt controller and one for its MSI second
> level interrupt controller. The first interrupt line is not currently
> managed by the driver, which is why it was not a functional problem.
> 
> The interrupt-map property was also only listing the PCI_INTA interrupts
> when there are also the INTB, C and D.
> 
> Reported-by: Jim Quinlan <jim2101024@...il.com>
> Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller")
> Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/fixes, thanks!
--
Florian

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